Microchip 16-bit PIC® MCUs and dsPIC® Digital Signal Controllers can be reset from 7 sources:
- Power-on Reset (POR)
- Master Clear Pin Reset (MCLR) (commonly called the reset pin on non-Microchip devices)
- Software Reset Instruction executed (SWR)
- Watchdog Timer Reset (WDTR)
- Brown-out Reset (BOR)
- Trap Conflict Reset (TRAPR)*
- Illegal Op-code / Uninitialized W register (IOPUWR)*
Simplified Block Diagram of a Reset
Reset Control Register
16-bit MCUs and DSCs have a Reset Control Regstser (RCON). When a reset occurs RCON is updated to indicate the source of the reset. (In addition to reporting reset conditions RCON also contains information on the WDT and some power saving modes). RCON can be examined by an application's start-up code to see why a device entered reset.
All of the reset status bits in RCON may be set or cleared in software. Setting one of these bits in software WILL NOT cause a device Reset.
Default Interrupt Vector
The MPLAB® XC16 C compiler places a Software Reset instruction at the Interrupt Vector location for interrupt sources in which the application does not provide their own service Routine. In the event an unexpected or non-mask-able interrupt were to occur the Software Reset instruction will cause a device reset to occur.
Clock Setting After a Reset
In most instances the clock setting at reset will be determined by the device's configuration words. For devices with clock switching enabled the initial clock setting is determined COSC<2:0> in the OSCCON register.
The amount of time it takes between entering a reset and executing the first line of code depends upon the oscillator being used. The primary and secondary oscillators must synchronize with an external clock source at reset and can take considerable time to become stable. Internal oscillators have no external dependency and become stable very quickly. Based upon the oscillator selected by the configuration bits the device will wait a pre-set amount of time allowing the clock is stable before exiting reset. Please consult the data sheet of the device you are using to determine the start up time for the elected oscillator.
16-bit MCUs and DSC configured for two speed start-up immediately begin the boot up process with the internal FRC oscillator, switching to the Primary Oscillator when it becomes stable.
Register Settings at Reset
Most Microchip peripheral special function registers (SFRs) are located in volatile RAM cells and are subject to having their values changed by a reset. Microchip data sheets contain a legend for each SFR detailing the values at reset ( see following diagram)
|R = Readable Bit||W = Writable Bit||U = Unimplemented bit, read as '0'|
|u = Bit is unchanged||x = bit is unknown||-n/n = Value at POR and BOR/Value at all other resets|
|'1' = bit is set||'0' = bit is cleared||-n = Value at POR reset|
- The lower case letters 'u', 'x' and the numbers 1 and 0 indicate the value of each bit after a reset.
- If an SFR bit has a different value at a POR or BOR reset than it has from other sources both value will be listed separated by a slash.
Memory values at Reset
A Power On Reset (POR) will result in the loss of all data memory. While resets other than POR may not change the content of memory, applications should not presume the values of the variables have not been changed.
C compilers invoke a pre-defined startup routine before the first user-written instruction is executed. The start-up routine runs after each reset. The purpose of the start-up routine is to prepare the system to run a C program. The typical startup code supplied by a compiler initializes the contents of memory overwriting the post-reset value of all variables.
The MPLAB® XC16 compiler offers the Persistent directive allowing the developer to exclude some variables from start-up initialization. Some compilers provide the option of running the start-up code without initializing variables. Please consult the manual of the compiler you are using to ensure you understand the validity of the variables in your application after a reset occurs.
Program Execution at Reset
The compiler places the application's start-up code at address 0x200. The user's 'main' function is placed beyond the start-up code in program memory. At address 0 the compiler places the assembly command GOTO address 0x200".
At reset the Program Counter is loaded with the value of '0' by the hardware causing program execution begins at address 0. The GOTO @0x200 instruction allows the program counter to by-pass the Interrupt Vector Tables and begin executing the startup code.
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TRAP CONFLICT RESET (TRAPR)
A Trap Conflict Reset (TCR) occurs when a hard and a soft trap occur at the same time.
ILLEGAL OPCODE RESET (IOPUWR )
A device Reset is generated if the device attempts to execute an illegal opcode value that was fetched from program memory. If a device Reset occurs as a result of an illegal opcode value, the IOPUWR status bit (RCON<14>) is set.
The Illegal Opcode Reset function can prevent the device from executing program memory sections that are used to store constant data. To take advantage of the Illegal Opcode Reset, use only the lower 16 bits of each program memory section to store the data values. The upper 8 bits should be programmed with 3Fh, which is an illegal opcode value.
The W register array (with the exception of W15) is cleared during all Resets and is considered
uninitialized until written to. An attempt to use an uninitialized register as an Address Pointer
causes a device Reset and sets the IOPUWR status bit (RCON<14>).