SAM C21 Sigma-Delta ADC Overview

Overview

The SAM C21 family of devices includes a Sigma-Delta Analog-to-Digital Converter (SDADC), which converts analog signals to digital values. The SDADC has 16-bit resolution, and is capable of converting up to 1.5 Msps divided by the data over sampling ratio (OSR). The input selection is up to three differential analog channels. The SDADC provides signed results.

ADC measurements can be started by either the application software or an incoming event from another peripheral in the device. ADC measurements can be started with predictable timing, and without software intervention.

The SDADC also integrates a sleep mode and a conversion sequencer. These features reduce power consumption and processor intervention.

A set of reference voltages is generated internally.

Features

  • 16-bit resolution
  • Up to 1,500,000 divided by Over Sampling Ratio (OSR) samples per second
  • Three analog differential inputs
    • Up to three external analog differential pairs.
  • Conversion Range:
    • Differential mode: -VREF to +VREF
    • Single-ended mode: 0 V to +VREF
  • Event-triggered conversion (one event input)
  • Optional DMA transfer of conversion settings or result
  • Single, continuous, and sequencing options
  • Hardware gain, offset, and shift compensation
  • Windowing monitor
  • Chopper mode (offset reduction)

Block Diagram

Key peripheral registers are highlighted in blue:

samc21-sdadc-block-diagram.png

 Learn More

 
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