SAM L10/L11 Analog Comparator (AC)
Overview
The Analog Comparator (AC) supports two individual comparators. Each comparator (COMP) compares the voltage levels on two inputs and provides a digital output based on this comparison. Each comparator may be configured to generate interrupt requests and/or peripheral events upon several different combinations of input change. Hysteresis and propagation delay can be adjusted to achieve the optimal operation for each application. The input selection includes four shared analog port pins and several internal signals. Each comparator output state can also be output on a pin for use by external devices.
The comparators are grouped in pairs on each port. The AC peripheral implements one pair of comparators. These are called Comparator 0 (COMP0) and Comparator 1 (COMP1) They have identical behaviors, but separate control registers. The pair can be set in window mode to compare a signal to a voltage range instead of a single voltage level.
Features
- Two individual comparators
- Selectable propagation delay versus current consumption
- Selectable hysteresis: 4-level on, or off
- Analog comparator outputs available on pins
- Asynchronous or synchronous
- Flexible input selection:
- Four pins selectable for positive or negative inputs
- Ground (for zero crossing)
- Bandgap reference voltage
- 64-level programmable VDD scaler per comparator
- Digital-to-Analog Controller (DAC)
- Operational Amplifier 2 (OPAMP2)
- Interrupt generation on:
- Rising or falling edge
- Toggle
- End of comparison
- Window function interrupt generation on:
- Signal above window
- Signal inside window
- Signal below window
- Signal outside window
- Event generation on:
- Comparator output
- Window function inside/outside window
- Optional digital filter on comparator output
Block Diagram
Principle of Operation
Using the AC’s I/O lines requires the I/O pins to be configured using the IO Pin Controller (PORT).
Each comparator has up to four I/O pins that can be used as analog inputs. Each pair of comparators shares the same four pins. These pins must be configured for analog operation before using them as comparator inputs. Any internal reference source, such as a bandgap voltage reference, OPAMP2, or DAC must be configured and enabled prior to its use as a comparator input. The analog signals of AC, Analog-to-Digital Converter (ADC), DAC, and OPAMP can be interconnected. The AC and ADC peripheral can request the OPAMP using an analog ONDEMAND functionality.
The AC bus clock (CLK_AC_APB) can be enabled and disabled in the Main Clock module, MCLK (see MCLK - Main Clock), and the default state of CLK_AC_APB can be found in Peripheral Clock Masking. A generic clock (GCLK_AC) is required to clock the AC. This clock must be configured and enabled in the generic clock controller before using the AC. This generic clock is asynchronous to the bus clock (CLK_AC_APB). Due to this asynchronicity, writes to certain registers will require synchronization between the clock domains.
The interrupt request lines are connected to the interrupt controller. Using the AC interrupts requires the interrupt controller to be configured first. The events are connected to the Event System.
Each comparator has one positive input and one negative input. Each positive input may be chosen from a selection of analog input pins. Each negative input may be chosen from a selection of both analog input pins and internal inputs, such as a bandgap voltage reference. The digital output from the comparator is 1 when the difference between the positive and the negative input voltage is positive and 0 otherwise. The individual comparators can be used independently (normal mode) or paired to form a window comparison (window mode).