SAM L10/L11 MCUs Low Power Techniques

Last modified by Microchip on 2023/11/15 12:23

This section explores the features of the various technological breakthroughs present in the SAM L10/L11 32-bit Arm® Cortex®-M23 Flash microcontrollers (MCUs), to solve power challenges for battery-powered applications and to extend battery life from years to decades.

Low-power Sleep modes, efficient power regulators, and optimized power strategies are some of the important features to consider for low-power applications. However, these are not the only features; intelligent techniques such as SleepWalking and Power Gating, introduced here, have become new key feature references to the low-powered embedded system world.

These techniques reflect a low-power design architecture where everything is designed to be power-efficient, from power domains and voltage regulators to the peripherals themselves.

SleepWalking is the capability of a device to temporarily and asynchronously wake up clocks for a peripheral to perform a task without waking up the CPU from STANDBY mode. We call this function SleepWalking because it allows the CPU to sleep until a relevant event occurs. During the time when the CPU is in STANDBY, the peripheral is able to request its clock (only) to perform its task autonomously.

Power Gating is an extension of the SleepWalking capability. In addition to the clock, it enables a power domain from retention to active state, on the fly, and automatically, saves power in STANDBY mode.

To enable those techniques, the Event System is a key peripheral, allowing peripherals to work together without CPU intervention to solve complex tasks using minimal gates and the lowest possible power.

A concrete and complete application example is proposed at the end of this section. It implements a combination of low-power innovations; Dynamic Power Gating, DMA, Peripheral Event, and SleepWalking around the RTC and ADC.

Low-power Design Considerations

Before considering any implementation of such features, the application developer must understand the application's power constraints. The following are some of the questions which must have accurate answers:

  1. Does my application need to be power-efficient?
  2. What will be the SLEEP/ACTIVE power ratio of my application?
  3. Does my application require the CPU to run at max CPU frequency during the Active mode?
  4. What will be the most suitable Sleep Mode for my application?
  5. How many active peripherals does my application require?
  6. Considering power efficiency, what is the best clock configuration for my application?

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