AVR® External Interrupts

Last modified by Microchip on 2023/11/09 09:02

AVR® devices have external interrupts that can wake a device from sleep based on a rising or falling edge signal at an I/O pin or a change in digital voltage level at an I/O pin. The device can then process an application based on the interrupt source and then go back to sleep. The device has multiple interrupt pins for multiple interrupt sources.

External Interrupts

External interrupts are triggered by the INT pin or any of the PCINT pins. If enabled, the interrupts trigger even if the INT or PCINT pins are configured as outputs. This feature provides a way of generating a software interrupt. The external interrupts can be triggered by a falling or rising edge or a low level. This is set up by the External Interrupt Control Register A EICRA. When the external interrupts are enabled and are configured as level-triggered, the interrupts trigger as long as the pin is held low.

The External Interrupt Control Register EICR controls how the external interrupts operate.

Table of External Interrupts

A low level interrupt on the INT pin is detected asynchronously. This implies that this interrupt can be used for waking the part also from sleep modes other than Idle mode. The I/O clock is halted in all sleep modes except Idle mode.

Pin Change Interrupt

The Pin Change Interrupt Request triggers if any enabled PCINT pin changes state. There are multiple pin change interrupts, all tied to a set of pins or ports.

On an ATmega324PB device, for example, the Pin Change locations are:

  • Pin Change Interrupt Request 4 (PCI4) triggers upon changes to pins PCINT[38:32]
  • Pin Change Interrupt Request 3 (PCI3) triggers upon changes to pins PCINT[31:24]
  • Pin Change Interrupt Request 2 (PCI2) triggers upon changes to pins PCINT[23:16]
  • Pin Change Interrupt Request 1 (PCI1) triggers upon changes to pins PCINT[15:8]
  • Pin Change Interrupt Request 0 (PCI0) triggers upon changes to pins PCINT[7:0]

The PCMSK4, PCMSK3, PCMSK2, PCMSK1and PCMSK0 registers control which pins contribute to the pin change interrupts. Pin change interrupts on PCINT are detected asynchronously. This implies that these interrupts can also be used for waking the part from sleep modes other than Idle mode.

Additional Information