8-bit PIC® Analog-to-Digital Converter

Last modified by Microchip on 2023/11/09 09:02

The Analog-to-Digital Converter (ADC) can convert an analog input signal to a 10-bit binary digital representation of that signal. The Microchip MCU analog inputs are multiplexed into a single sample and hold circuit. The output of the sample and hold is connected to the input of the ADC. The ADC generates the 10-bit binary result via successive approximation and stores the conversion result in the ADC result registers.

adc block

The ADC uses a voltage reference that is software-selectable to be either internally generated or externally supplied.

The ADC can also generate an interrupt upon completion of a conversion. This interrupt can be used to wake up the device from SLEEP.

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ADC Configuration

When the ADC is first set up it needs to have several configuration settings enabled. These include:

  • ADC port configuration
  • ADC channel selection
  • ADC voltage reference selection
  • ADC conversion clock source
  • ADC interrupt control
  • ADC result format

We'll step through each of these below.

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ADC Port Configuration

The first configuration setting is the I/O pin setup. Most of the ADC I/O pins can be used as either an analog input or a digital input. When converting analog signals using the ADC, the I/O pin must be configured for analog input by setting the associated bits in the TRIS register and ANSEL register.

The TRIS register for the I/O pin needs to have its associated bit set to 1 to make it an input. If the I/O pin is part of the PORTA block then the TRISA register contains the bit.

trisa

The next step is to set the bit on the ANSEL register for the I/O pin and set the bit to 1 to enable the ADC on that pin. If the I/O pin is part of the PORTA block then the ANSELA register contains the bit.

ansela

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ADC Channel Selection

The ADC multiplexer needs to be connected to the I/O pin prior to starting the sample and hold process. This is done with a set of bits in the ADCON0 register. Before an ADC sample is requested, these channel-select bits are set to connect to the desired I/O pin. Only one pin can be connected to the ADC at a time. After the process is complete then the selection bits can be changed to connect to the next pin and the ADC process starts over again.

adcon0

adc select

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ADC Voltage Reference Selection

The ADC can use various voltage reference sources as the basis for analog voltage measurements.

Digital Value = [Analog Voltage / (VREF+ - VREF-) ] * 1024

The ADPREF bits of the ADCON1 register provide control of the positive voltage reference. The positive voltage reference can be:

  • VREF+
  • VDD
  • Fixed Voltage Reference (FVR)

The ADNREF bits of the ADCON1 register provide control of the negative voltage reference. The negative voltage reference can be:

  • VREF-
  • VSS

VDD and VSS are the connections to the voltage bus that powers the device.

VREF+ and VREF- are specific I/O pins on the device. An external voltage reference is connected to these pins.

FVR is a feature on many PIC® devices, though not all. It can include a single voltage or sometimes more than one voltage level is available.

The voltage reference selection bits are in the ADCON1 register and the selection options are shown in the accompanying image.

adcon1vref

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ADC Conversion Clock Source

The source of the conversion clock is software selectable via the ADCS bits of the ADCON1 register. There are up to seven possible clock options depending on the device being used:

  • FOSC/2
  • FOSC/4
  • FOSC/8
  • FOSC/16
  • FOSC/32
  • FOSC/64
  • FRC (dedicated internal oscillator)

FOSC is the system oscillator that is running the device instruction clock.

The clock is critical to producing the fastest but also accurate Analog to Digital Conversion. The time to complete a 1-bit conversion is defined as TAD. One full 10-bit conversion requires 11.5 TAD periods as shown in the accompanying image.

tad

For correct conversion, the appropriate TAD specification must be met. An ADC clock can be easily selected from the accompanying chart. A similar chart appears in the device datasheet. The values that are the best show up in the middle of the chart on a white background.

tad chart

The internal oscillator FRC selection will be a slower conversion but will guarantee the TAD requirements are met. The FRC can also be used in sleep mode to run ADC measurements.

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Interrupt Control

The ADC module has the ability to generate an interrupt upon completion of an Analog-to-Digital conversion. This interrupt can also be generated while the device is operating or while in SLEEP. If the device is in SLEEP, the interrupt will wake up the device and then process the Interrupt Service Routine (ISR) as long as the interrupt bits are enabled.

Those interrupt bits include:

  • The ADC Interrupt Flag is the ADIF bit in the Peripheral Interrupt (PIR1) register 1.
  • The ADC Interrupt Enable is the ADIE bit in the Peripheral Interrupt Enable (PIE1) register.
  • The Global Interrupt Enable (GIE) bit and the Peripheral Interrupt Enable (PEIE) bits in the INTCON register must also be enabled.

After an interrupt from SLEEP mode is executed and the ISR and ADC are completed, the ADIF bit must be cleared in the software.

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ADC Result Format

The ADC conversion result is stored in two 8-bit wide registers; ADRESH and ADRESL. This register pair is 16-bits wide so the ADC module has the flexibility to left or right justify the 10-bit result in the 16-bit result register. The ADC Format Select bit (ADFM) in the ADCON1 register controls this justification. The extra bits in the ADRESH and ADRESL registers are loaded with ‘0’s.

justified

adfm bit

The result can then be copied to a variable or used in an equation to implement a function based on the ADC result.

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