Configuration Bits - are a collection of binary data located in the flash memory of a PIC® MCU. Configuration bits are programmed into the PIC MCU with the application code. Configuration bits are not executable code as their address is not accessible by the program counter. When programmed into a PIC MCU configuration bits complete circuitry which enables or disables hardware features of the MCU.
Configuration bits are "read" when exiting a reset and cannot be modified during run-time.
The Special Features of MCU operation controlled by the configuration bits include:
- System Clocking
- Power Management
- Device Security
- Operating Characteristics
Configuration bits are generated from compiler/assembler directives included in the source code files.
This page describes what features are controlled by configuration bits and how to generate them in source code.
The configuration bits and settings for individual PIC16F1xxx devices may vary. Check your datasheet for the specifics of the PIC® MCU configuration bits you are using.
Location and Format
The configuration bits for the PIC16F1 MCU family are combined into two 14-bit words called CONFIG1 and CONFIG2. The configuration words are located beyond the reach of the program counter at addresses 0x8007 and 0x8008 in the MCU's flash memory.
Configuration Settings from PIC16F1937 Data Sheet
Configuration bits are generated by compiler directives inserted into the application's source code. When a PIC® MCU project is built, the configuration bit settings are loaded into the HEX output file. The configuration bits are programmed into the PIC with the application program.
Generating Configuration Bits in C Code
Microchip's MPLAB® XC8 C compiler accepts #pragma directives to set the configuration bits.
The syntax for generating configuration bits:
#pragma config CONFIG_BIT_NAME = CONFIG_VALUE
Sample of Setting Configuration Bits in C
When setting configuration bits using C it is not necessary to know the word which contains the bit being set.
All that is needed is the configuration bit name and the desired value.
The header files for each PIC16F1xx device contain the CONFIG_BIT_NAMEs and CONFIG_VALUEs. A full list of the settings can be found on the Configuration Bits Summary
Once written, the compiler directives must be added to the PIC® MCU project in one of three ways:
- In a stand alone C source file which is added to the project.
- In a header (.h) file placed in the project with an #include statement.
- Placed directly inside one of the source code files already in the project.
Developers using the XC8 compiler can refer to the Configuration Bits section of the MPLAB® X Tutorial to see shortcuts in generating the code needed to set the configuration bits.
Generating Configuration Bits in Assembly
When working with assembly language the programmer is required to generate the specific 14-bit values for each of the 2 configuration addresses. Once the patterns are generated the program makes a call to the __CONFIG directive to set each of the configuration words.
A 14-bit pattern for each individual configuration bit setting is listed in the .INC file for each PIC® MCU. The 14-bit value passed to the __CONFIG directive is generated by logically ANDing the bit settings in the .INC file.
The code to generate and load the configuration bits can be placed in any assembly source file in the project.
Sample of Setting CONFIG2 in assembly language
A summary of the configuration bits settings for a typical PIC16F1xxx MCU can be found on the Assembly Language Configuration Bit Sumary page
FOSC- Clock Source
FOSC consists of three individual configuration bits: FOSC2,FOSC1, and FOSC0. The FOSC bit-field is located in CONFIG1.
FOSC selects the clock source for MCU
The FOSC Optons are:
|0 0 0||INTOSC||Internal oscillator|
|0 0 1||EXTRC||External RC oscillator|
|0 1 0||HS||External High Speed Crystal 0scillator|
|0 1 1||XT||External Crystal oscillator|
|1 0 0||LP||External Low Power Crystal Oscillator|
|1 0 1||ECH||External Clock w/ frequency range 4 - 32 MHz|
|1 1 0||ECM||External Clock w/ frequency range 0.5 - 4 MHz|
|1 1 1||ECL||External Clock w/ frequency range 0 - 0.5 MHz|
Selecting the System Clock
FCMEM - Fail Safe Clock Monitor
The FCMEM is a single configuration bit residing in CONFIG1
FCMEM controls the operation for the Fail Safe Clock Monitor allowing the clock to switch from external to internal in the event of an external clock failure.The options for FCMEM are:
|FCMEM||Setting||Fail-Safe Clock Monitor Function|
Enabling Fail Safe Clock Monitor
IESO - Intlernal/External Switch-over
The IESO is a single configuration bit residing in CONFIG1
IESO sets the mode for clock switching and two speed start-up. With IESO enabled the clock source can be controlled by the application program.The Options for IESO are:
|IESO||Setting||Two Speed Star-up Function|
Enabling Two Speed Start-up
CLKOUTEN - Enabling Clock Output
The CLKOUTEN is a single configuration bit residing in CONFIG1
CLKOUTEN allows the OSCx/CLCKOUT pin to output the internal system clock. This allows the PIC16F1xxx system clock to drive other components.The options for CLKOUTEN are:
|0||ON||Fosc will be output to OSCx/CLKOUT|
|1||OFF||OSCx/CLKOUT will be the oscillator or a peripheral function|
Outputting the Internal System CLock
PLLEN - Phase Lock Loop Enable
PLLEN is a single configuration bit residing in CONFIG2
The internal oscillator's 4 X Phase Lock Loop ( PLL) is controlled by a combination of the PLLEN configuration bit and the SPLLEN bit in the OSCON register.The options for PLLEN are:
|PLLEN||Setting||Internal PLL function|
|0||ON||4 X PLL is always enabled|
|1||OFF||4 X PLL is controlled by SPLLEN bit in OSCCON|
Not all PIC16F1xxx MCUs have the same options for the PLL. Please refer to the datasheet of the PIC MCU you are using to determine the specific PLL configuration settings
Enabling the Internal Phase Lock Loop
BOREN - Brownout Reset Enable
The BOREN configuration setting consists of two individual bits: BOREN1 and BOREN0. The BOREN bit-field resides in CONFIG1.
BOREN allows an MCU RESET to occur if Vdd drops below a preset value. The voltage level precipitating the RESET is determined by the configuration bit BORV.
There are four options for the two BOREN bits:
- Brown-out reset is always enabled
- Brown-out-reset is always disabled
- Brown-out reset is enabled when running, but disabled when MCU enters SLEEP Mode
- Brown-reset is controlled at run-time by the SBOREN bit of the PCON regoster.
|BOREN||Setting||Brown-Out RESET Function|
|1 1||ON||Always enabled|
|0 0||OFF||Always disabled|
|1 0||NSLEEP||Enabled while ACTIVE, disabled with in SLEEP mode|
|0 1||SBODEN||controlled by SBOREN bit of PCON Register|
Enabling/Disabling Brown-out RESET
BORV - Brownout Voltage Level
BORV is a single configuration bit residing in CONFIG2
BORV is only applicable when the Brown-Out Reset (controlled by the BOREN configuration bit) is active.
BORV selects one of two pre-set voltage levels as the Brown-out Reset voltage.
The Brown-out Voltage level set by BORV may vary depending on the particular PIC MCU. Check the data sheet for the brown-out voltage options
Enable Brown-out RESET to always be active and triggered at 2.5V
Enable Brown-out RESET at 1.9V while MCU is ACTIVE and disable Brown-out in SLEEP mode.
VCAPEN - LDO Voltage Regulator
The VCAPEN configuration setting consists of two individual bits: VCAPEN1 and VCAPEN0. The VCAPEN bit-field resides in _CONFIG2.
For devices with an internal LDO regulator VCAPEN determines which pin is assigned as the Vcap pin.The settings for VCAPEN are:
|0 0||RA6||RA6 is assign as Vcap|
|0 1||RA5||RA5 is assign as Vcap|
|1 0||RA0||RA0 is assign as Vcap|
|1 1||OFF||Vcap is disconnected from all pins|
Not all PIC16F1xxx MCUs have an internal LDO regulator. Please refer to the datasheet of the PIC MCU you are using to determine if there is an LDO and what pins are available as Vcap
Assigning Vcap to RA6
Disabling Vcap functionality
LVP - Low Voltage Programming
LVP is a single configuration bit residing in CONFIG2
Low Voltage programming entry mode allows PIC16F1xxx MCUs to be programmed with only Vdd. Using LVP eliminates the need to supply a higher than Vdd voltage on MCLR/Vpp.The settings for CPD are:
Disabling EEPROM Reads from External Sources
CPD - Data EEPROM Read Protecton
CPD is a single configuration bit residing in CONFIG1
The internal data EEPROM memory can be protected from external reads with CPD. External programmer are inhibited from reading protected EEPROM. The contents of EEPROM is still available for reads from internal sources.The settings for CPD are:
|CPD||Setting||EEPROM Read Protection Function|
|0||ON||Enabled - EEPROM is not readable|
|1||OFF||Disabled - EEPROM is readable|
Disabling EEPROM Reads from External Sources
CP - Program Memory READ protection
CP is a single configuration bit residing in CONFIG1
The entire program memory space can be protected from external reads with CP.
External programmer will see all '0's when they read protected program memory. The contents of program memory is still available for reads from internal sources.The settings for CP are:
|CP||Setting||Read Protection Function|
|0||ON||Enabled - memory is not readable|
|1||OFF||Disabled - memory is readable|
Disabling External Program Memory Reads
WRT - Flash Self Write Enable
WRT consists of two individual configuration bits: WRT1 and WRT0. The WRT bit-field is located in CONFIG2
WRT establish the address range in which the Program Memory can be written by the user program.
The settings for WRT are:
|WRT||Setting||Flash Self Right Functionality|
|1 1||ALL||No memory can be written to by user program|
|1 0||BOOT||Address range 0 - 0x1FF write protected 200h - FFFn write-able|
|0 1||HALF||Address range 0 - 0x7FF write protected 800h - FFFn write-able|
|0 0||OFF||All memory addresses can be written to by user program|
Not all PIC16F1xxx MCUs have the same WRT options as shown. Please refer to the datasheet of the PIC MCU you are using to determine the WRT options for the device you are using.
Enabling Program Memory Self-Write
MCLRE - Pin Control for MCLR
MCLRE is a single configuration bit residing in CONFIG1
MCLRE controls the function of the MCLR /Vpp pin.
MCLRE is ignored if the Low Voltage Programming ( set by the LVP configuration bit) is not enabled.The settings for MCRLE are:
|1||ON||Pin function is MCLR /Vpp with internal weak pull-up enabled|
|0||OFF||Pin function is digital input with internal pull-up controlled by WPUx|
Leaving MCRL/Vpp as the RESET pin.
Making MCRL/Vpp a digital input pin.
PWRTE - Power UP Timer
PWRTE is a single configuration bit residing in CONFIG2
The Power Up Time provides a nominal 72 ms delay after a Power On Reset or a Brownout Reset to allow Vdd to stabilize. Enabling or disabling this delay is controlled by PWRTE .The options for PWRTE are:
|PWRTE||Setting||Power-up Timer Function|
Enabling Power On Timer
For more information on the operating and enabling of the Power-Up Timer is located on the 8-Bit Power-Up Timer page.
WDTE -Watchdog Timer Enable
The WDTE configuration setting consists of two individual bits: WDTE1 and WDTE0. The WDTE bit-field resides in CONFIG1.
WDTE allows an MCU RESET to occur if the internal Watch Dog Timer rolls over from 0xFF to 0x00 before the MCU can execute a CLRWDT instruction.
There are four options for the two WDTE bits:
- Watch Dog Timer Reset is always enabled
- Watch Dog Timer Reset is always disabled
- Watch Dog Timer Reset is enabled when running, but disabled when MCU enters SLEEP Mode
- Watch Dog Timer Reset is controlled at run-time by the SWDTEN bit of the WDTCON regoster.
|WDTE||Setting||Watch Dog Reset Function|
|1 1||ON||Always Enabled|
|0 0||OFF||Always Disabled|
|1 0||NSLEEP||Enabled while ACTIVE, Disabled when in SLEEP mode|
|0 1||SBODEN||Controlled by SBOREN bit of PCON Register|
Watchdog Timer Configuration Options:
STVREN - Hardware Stack Overflow
STVREN is a single configuration bit residing in CONFIG2
The STVREN configuration bit enables or disables a RESET on a stack overlfow or underflow.
A stack overflow or underflow always sets the STKOVF or STKUNF bit in the PCON register regardless of STRVEN's value.
|1||ON||Stack over/under flow RESET is ENABLED|
|0||OFF||Stack over/under flow RESET is DISABLED|
The configuration bits and settings for individual PIC16F1xxx devices can be different. Check your datasheet for the specifics of the PIC MCU configuration bits you are using.
Enabling Stack Overflow RESET
DEBUG - Debug Mode
The DEBUG bit in Configuration Word 2 is managed automatically by the MPLAB®X IDE.
To ensure proper device operation, this bit should not be altered by the user!