Program Memory on the Enhanced Mid-range MCU consists of up to 32 MB of 14-bit wide flash memory. After the MCU is programmed, the program memory contains the user's application code. Program memory is accessed by a 15-bit Program Counter Register (PC).
At RESET the program counter is cleared, resulting in all 0s. This allows program memory address 0h to be the location of the first instruction executed after a RESET condition.
When an interrupt occurs program control is transferred to address 04h. The Interrupt Section provides a complete description of the interrupt process
A sixteen entry 15-bit wide hardware return stack stores the Program Counter in the event of either an interrupt or call to a subroutine. The return stack works on a Last-In-First-Out basis.
Upon executing a Return instruction ( RETFIE or RETURN) the top element of the stack is removed from the stack and placed into the program counter.
In order to read or modify the 14-bit Program Counter with an 8-bit MCU two SFRs are utilized:
- PCL - contains the lower 8 bits of the program counter <PC7:0>
- PCLATH - contents depends upon MCU operation being performed
PCL and PCLATH are used when the program writes to the program counter, reads the program counter, or executes a GOTO or CALL instruction.
Writing to the Program Counter
When the application writes to PCL the current contents of PCLATH<5:0> will be written to PC<14:8>. Because of this, the contents of PCLATH<5:0> MUST always be correct BEFORE writing to PCL.
Reading the Program Counter
When PCL is read by an application PC<14:8> is captured into PCLATH
Executing a CALL or GOTO instruction
The CALL and GOTO instructions only have 11 bits available to specify the destination address. PCLATH is used to extend the operand to access all the program memory addresses. When either a CALL or GOTO is executed the 11-bit address from the operand is loaded into PC<10:0> and PCLATH<6:3> is loaded into PC<14:11>.