Summary of Configuration Bit Settings for the Enhanced Mid-Range PIC MCU using the XC8 Compiler

Below is a summary of the PIC16F1xxx configuration bit directives accepted by Microchip's MPLAB® XC8 C compiler.

A comprehensive description of these configuration bit settings is presented on the Configuration Bits section of the Enhanced Mid-range Tutorial.

Some Enhanced Mid-Range PIC® MCUs may have a different set of configuration bits.
Check the datasheet of the MCU you are using to get a complete list.

Syntax

#pragma config CONFIG_BIT_NAME = CONFIG_VALUE

CONFIG_BIT_NAME CONFIG_VALUE Function of the configuration bits
FOSC
INTOSC
EXTRC
HS
XT
LP
ECH
ECM
ECL
Internal Oscillator is the clock source.
External R-C Oscillator is the clock source.
External High Seed Crystal/Oscillator
External Crystal/Oscillator
External Low Power oscillator
External Clock w/ frequency range 4 - 32 MHz
External Clock w/ frequency range 0.5 - 4 MHz
External Clock w/ frequency range 0 - 0.5 MHz
WDTE
ON
OFF
NSLEEP
SWDTEN

Watchdog Timer (WDT) is disabled.
WDT is enabled.
WDT is enabled when running and disabled when in SLEEP mode.
WDT controlled by the SWDTEN bit in the WDTCON register.
PWRTE

ON
OFF

Power Up Timer Enabled
Power Up Timer Disabled
MCLRE

ON
OFF

Pin function is MCLR
Pin function is digital input
CP

ON
OFF

Code Protection is enabled
Code Protection is disabled
CPD

ON
OFF

Data Memory Code Protection is enabled
Data Memory Code Protection is disabled
BOREN

ON
OFF

Brown-Out Reset is enabled
Brown-Out Reset is disabled
CLKOUTEN

ON
OFF

CLKOUT function is enabled on the CLKOUT pin
CLKOUT function is disabled. I/O or osc function on the CLKOUT pin
IESO

ON
OFF

Internal/External Clock switch-over mode is enabled
Internal/External Clock switch-over mode is disabled
FCMEN

ON
OFF

Fail-Safe Clock Monitor is enabled
Fail-Safe Clock Monitor is disabled
WRT

ON
OFF

Flash Memory self-write protection is Enabled
Flash Memory self-write protection is Disabled
PLLEN

ON
OFF

4X internal PLL is enabled
4X internal PLL is disabled
STVREN

ON
OFF

Stack Overflow or Underflow will cause a Reset
Stack Overflow or Underflow will NOT cause a Reset
BORV

LO
HI

Brown-Out voltage Reset - Low Trip Point Selected
Brown-Out voltage Reset - High Trip Point Selected
LVP

ON
OFF

Low Voltage Programming enabled
High-voltage on MCLR/VPP must be used for programming
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