A/D Converter (ADC) Basics

# A/D Converter (ADC) Introduction

The ideal A/D converter (ADC) produces a digital output code that is a function of the analog input voltage and the voltage reference input. The figure below shows the basic ADC measurement circuit.

The formula for the ADC digital output is provided by Equation 1

(1)
$$Output Code = FS (VIN_+ - VIN_-)(VREF_+ - VREF_-)$$

Full-Scale (FS) is defined as analog input voltage range where the ADC digitizes the input up to the maximum full-scale input voltage. The FS input voltage range is determined by the voltage reference value. FS range varies from device to device, for an n-bit (n is the resolution in bits) ADC, FS = (2n) (code width)

# ADC Transfer Function

Some ADCs have pseudo-differential configuration, two pins (VIN+ and VIN-) are used for the signal input. With a pseudo-differential input, the second input pin provides the reference for the signal. The distinction between pseudo-differential inputs and standard differential inputs is that the signal on the VIN- can only deviate a small range from the voltage of the VSS supply rail. Although this restriction requires that a single-ended source is connected to the ADC, the input stage maintains the ability to cancel small common-mode fluctuations on the input pins. The voltage reference for the ADC may be provided internally or by an external source. Since the accuracy of the measurement results is directly affected by the reference, it is important that the reference source is stable over time and temperature.

For low cost converters, the reference input is often implemented as a single-ended input. In this case, one pin is used for the reference input and the input voltage range for the converter is determined by VSS and VREF. For higher performance converters, two voltage reference pins are typically provided. The input voltage range for these converters is determined by the voltage difference between VREF+ and VREF-. In either case, the voltage range for the reference inputs is usually restricted by the VDD and VSS power supply rails. Although a “real world” ADC will have higher resolution, a theoretical 3-bit ADC will be used here to demonstrate the performance of the ideal converter and the various sources of error. The figure shows the transfer function of the ideal 3-bit ADC. As the transfer function indicates, the ideal 3-bit ADC provides eight equally spaced digital output codes over the analog input voltage range. Each digital output code represents a fractional value of the reference voltage. The largest value that can be obtained from the ADC is (n-1)/n, where n is the resolution in bits. Referring to the figure, the largest output value that the 3-bit ADC can produce is 7/8ths of the full-scale reference voltage.

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