Peak Current Mode System Block Diagram

Last modified by Microchip on 2023/11/10 11:17

Peak current mode systems are characterized by having two loops, an inner current loop, and the outer voltage loop. The Digital Compensator Design Tool (DCDT) does not require any specific order to be followed when defining the system blocks, but the following order is recommended as it will facilitate the compensator design:

  1. Define the Control to Inductor Current block (Gid)
  2. Define the Current Feedback
  3. Provide information about the Comparator block
  4. Define the Control to Output Voltage block (Gvd)
  5. Define the Voltage Feedback
  6. Design and optimize the Compensator

See the "Related Application Notes" page for more information on how to extract the described transfer functions from the specific hardware topologies.

Peak Current Mode System Block Diagram