Getting Started with PolarFire using Libero

PolarFire Design Flow Tutorial

This tutorial demonstrates how to implement basic PolarFire FPGA designs using the Libero SoC design tool. The design used in this tutorial runs on an MPF300T_ES connected to a PolarFire Splash Kit. This tutorial is set up as six separate lessons. Each lesson adds complexity and builds upon the previous lesson.
After completing this tutorial, you will be familiar with the following:

  • Creating a Libero SoC PolarFire project
  • Compiling a design
  • Assigning simple I/O pin constraints
  • Programming the device
  • Testing your design

Polar Fires SoCs are supported in Libero v12.0 and above.

Tutorial Requirements

Software Requirements

Microsemi Libero SoC v12.0 (or above)

Hardware Requirements

PolarFire Splash Kit (MPF300-SPLASH-KIT-ES).

Source Files

There are no source files required for this lab. The design will be created from scratch.

If you are new to FPGA designs and would like more background information how to design Microchip FPGAs you may find the information on Microchip's FPGA Design Process useful.


This tutorial has six lessons and a total of 37 steps which illustrate how to implement a design for a PolarFire SoC. While the design in this tutorial is a simple AND gate, the individual steps demonstrated are identical to those needed for a practical design.

Lesson 1 - Creating the PolarFire Project

The first step in an FPGA design is to open Libero SoC and create a blank project.

1

Click Start > Programs > Microsemi Libero SoC v12.x > Libero SoC v12.x, or click the shortcut on your desktop. The Libero SoC PolarFire Project Manager opens, as shown below.

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2

Open Libero's new project wizard by clicking New on the Start Page tab or by clicking Project > New Project from the Libero SoC menu.

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3

Enter the information shown below in the Project Details pane of the New Project dialog box then click Next:

  • Project Name: PolarFire_basic (Note: name is case sensitive for Verilog designs.)
  • Project Location: <C: or D:>/Microsemiprj (or the path where the files were extracted if different)
  • Preferred HDL type: Select either VHDL or Verilog based on your HDL preferences
img3.png

4

This tutorial uses the standard MPF300T on the development board. Enter the following in the Device Selection pane of the New Project dialog box then click Next:

  • Family: PolarFire
  • Die: MPF300T_ES
  • Package: FCG484
  • Speed: -1
  • Range: EXT
img4.png

5

Enter the following in the Device Settings pane of the New Project dialog box then click Finish:

  • Core Voltage: 1.0 (default)
  • I/O Settings
    • Default I/O technology: LVCMOS3.3V
    • Reserve pins for probes: checked (default)
  • System controller suspended mode: un-checked (default)
img5.png

Lesson 2 - Creating Your Design

Once a Libero project has been created (or opened) a design needs to be entered.
We will use the Design Flow window to manage most of the flow. The Design Flow window has multiple tabs. You can switch between these tabs by clicking the tab name at the bottom.

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1

In the Design Flow window, double-click Create SmartDesign and name your design “andgate” then click OK. This opens the SmartDesign Canvas.

img6b.png

2

Select the Catalog tab in the Design Flow window and expand the Macro Library section.

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3

Drag the AND2 gate from the Catalog onto the blank SmartDesign Canvas on the right.

4

Use the mouse to select A and then right-click to bring up the menu. From the menu select Promote to Top Level, this creates an external connection on the device that we will connect to a switch. Repeat for B and Y.

img9.png

5

When you have completed this you should have the following view:

img10.png

6

Click the Generate Component button generate_component_icon.png on the top of the canvas to generate the design.

7

Confirm the message “'andgate' was successfully generated” appears in the Libero SoC Log tab.

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8

Select the Design Hierarchy window and click the Build Hierarchy button.

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9

andgate” appears in bold font on the Design Hierarchy tab indicating that it is the root level.

Lesson 3 – Synthesis and Pin Assignment

Now that the design has been entered we will translate the written design into a form that is machine-readable. For SoCs, this process is called synthesis. Before the synthesized design is placed into a device we will also set up the design constraints. For this tutorial, the only constraints we will place are the pin assignments.

It is quite common for a designer to perform a function simulation of their designs prior to synthesis. For this simple example, we are omitting the simulation step

1

Double-click Synthesize under Implement Design in the Design Flow window to synthesize the design with Synplify Pro. Synplify Pro adds I/O pads to the design. A green check mark appears in the Design Flow window to indicate synthesis was successful.

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2

Since this is a very simple design, the only other thing we need to do is tell the tools which I/Os to use. Double-click Manage Constraints in the Design Flow window to open the Libero SoC Constraints Manager.

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3

Confirm the I/O Attributes tab is selected. Use the pull-down menu on the Edit button to select Edit with I/O Editor (highlighted in the figure above) to open the I/O Editor.

4

Select the Port View tab of the I/O Editor.

img18.png

5

Use this window to set the I/O Standard and Pin Number. Confirm that LVCMOS33 is the I/O Standard for each pin.

6

Click Unassigned in the Pin Number column to reveal available I/O pins. Make the following assignments: (you can type the pin number in the field or use the pull-down menu to select the pin)

  • A -> K5
  • B -> K4
  • Y -> P7

7

Make sure your connections match the image below then click on File > Commit and close the window, File > Exit.

img21.png

Push-Button Switches

The PolarFire Splash Kit comes with four debug push-button switches that are connected to the PolarFire FPGA. The table below lists the onboard push-button switches.
Switch Number FPGA Pin Number FPGA Pin Name
SW3 L6 GPIO210PB4
SW4 M7 GPIO210NB4
SW5 K5 GPIO211PB4/DQS
SW6 K4 GPIO211NB4/DQS
img_switches.png

User LEDs

The board provides user access to eight active low LEDs, which are connected to the PolarFire device for debugging applications. The table below lists the onboard debugging LEDs.
Reference Board LED FPGA Pin Number FPGA Pin Name
LED1 P7 GPIO186PB4
LED2 P8 GPIO186NB4
LED3 N7 GPIO187PB4/DQS
LED4 N8 GPIO187NB4/DQS
LED5 N6 GPIO188PB4
LED6 N5 GPIO188NB4
LED7 M8 GPIO189PB4
LED8 M9 GPIO189NB4
img_leds.png

8

If you click the green arrow button at the top of the Design Flow window, you can now run the design all the way through Place and Route.

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Lesson 4 - Programming the Design

This step will run FlashPro in batch mode to program the PolarFire MPF300TS on the PolarFire Splash Kit board shown below.

img_board.png

1

Prior to programming (and powering up) the PolarFire Splash Kit board, confirm that the jumpers are positioned as shown in the table below.

Jumper Location Function Setting
J5, J6, J7, J8, J9 Top edge of the board near the 12V power supply input. Jumpers to select the PolarFire JTAG or A2F JTAG. Pin 1–2 programming the power sequence and monitoring chip through the FTDI. Pin 2–3 for programming the PolarFire FPGA through FTDI 2-3 installed (programming through FTDI)
J11 Near the reset switch (SW2). Jumper to select the external JTAG or the on-board FTDI chip for programming the PolarFire device. Pin 1–2 for programming through the FTDI chip 1-2 installed
J10 Near the reset switch (SW2). Jumper to select programming through external SPI flash Open
J3 Near the Power On/Off switch. Jumper to select the core voltage. Pin 1–2 installed for 1.05 V. Pin 1-2 open for 1.0 V Open
J4 Right of the AC jack (J9). Jumper to select the SW3 input or the ENABLE_FT4 232 signal from the FT4232H chip. Pin 1-2 for manual power switching using SW3. Pin 2-3 for remote power switching using the GPIO capability of the FT4232 chip 1-2 installed
J32 Lower right-hand corner of the board. Jumper to select the PolarFire VCCIO voltage (VCCIO_HPC_VADJ) to 1.2V, 1.5V, 1.8V, 2.5V, or 3.3V. Pin 1-2: 3.3. Pin 3-4: 2.5 V. Pin 5-6: 1.8 V. Pin 7-8: 1.5 V. Pin 9-10: 1.2V 1-2 installed

2

Connect 12V power supply brick to the J2 connector.

3

Connect a USB cable between the J1 mini USB connector and the host PC.

4

Slide the main power switch SW1 to ON position.

5

Install the FlashPro4 drivers if prompted. The drivers are located in the <Libero SoC PolarFire v2.2 Installation Directory>\drivers folder.

6

Expand Program Design in the Design Flow window. Right-click Run PROGRAM Action and select Run to generate the programming file and begin programming.

7

FlashPro runs in batch mode and programs the device. Programming messages are visible in the Libero SoC Log window (programmer number will differ).

Do not interrupt the programming sequence.

8

The following message should be visible in the Reports view under Run PROGRAM Action when the device is programmed successfully (programmer number will differ):
programmer 'E2001JZK2X' : device 'MPF300T_ES' : Executing action PROGRAM PASSED.

img30a.png

A green check mark will appear next to the Program Design and Run PROGRAM Action in the Design Flow window, to indicate programming completed successfully.

img30b.png

9

Click Project > Save from the Libero menu to save your completed project. Do not close it, we will use it again.

Lesson 5 - Running the design

This is a very simple design designed to show an AND gate.

  • Observe LED1 with Switch 5 and Switch 6 released – it will illuminate
  • Press Switch 5 and observe the behavior of LED1 – it will turn off
  • Press Switch 6 and observe the behavior of LED1 – it will turn off
  • Press both switches and LED1 will turn off.

Intuitively, for an AND gate one would expect that both switches should be depressed to illuminate the LED.

Look again at the images from the User’s Guide on page 13. Releasing the switch generates a logic one, which illuminates the LED. We need to invert the input signals to illuminate the LED when both switches are pressed.

Lesson 6 - Design Iterations in Libero SoC PolarFire

1

Reopen the SmartDesign Canvas, look for the tab.

2

Hold the CTRL key and select input ports A and B of AND2_0, then click the right mouse button to bring up the menu. Select Invert to invert the signals, this is built into the SmartDesign capabilities to invert or Tie off any I/O.

img_new.png

3

The ports are inverted.

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4

Click the Generate Component button, this will reset the rest of the compilation functions but keeps your I/O constraints.

5

Right-click Run PROGRAM Action on the Design flow window and select Update and Run to run all the steps in between and reprogram the device in one click. If it seems to be taking a while, check to see if the Warning dialog box about running in non-Timing-driven mode is behind your active window.

6

Observe the correct behavior on the board by pressing both switches simultaneously to illuminate LED1.

 Learn More

 
PolarFire SoC Architecture
Learn more >
 
Designing with Microchip FPGA Tools
Learn more >
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