Data Link Layer Overview

In the OSI model, Data Link Layer protocols are concerned with establishing/terminating a connection between two nodes, and ensuring reliable data transfer. They also implement protocols for flow-control between the nodes.

Overview

LIN is a broadcast-serial network. The data link layer implements a master-slave principle for medium access control. All messages are initiated by the master with at most one slave replying to a given message identifier. The master node controls the issuance of data frames on the bus, makes sure that they are sent with the right interval and periodicity, and that every frame gets enough time space on the bus.

The LIN network is described by a LDF (LIN Description File) which contains information about frames and signals (including timing). This file is used for creation of software drivers in both master and slave nodes.

The LIN bus was designed to transport short control messages (2, 4, or 8 bytes). The data that are exchanged in the frames are referred to as Signals.

The LIN data transfer model is based on the publish-subscribe model, for example:

unconditional-frames.png

Note:

  • Frame Slot A, Frame Slot B and Frame Slot C are cyclic (i.e. they cycle regularly through all the nodes)
  • The Nodes that reply to the header are the PUBLISHERS
  • The Nodes that listen are the SUBSCRIBERS
  • Frame Slot A
    • Point-to-Point (Slave-to-Master or Slave-to-Slave) communications
      • SLAVE1 Publishes, MASTER and/or SLAVE2 Subscribes
  • Frame Slot B
    • Multicast (Master-to-one-or-more Slaves) communications
      • MASTER Publishes, SLAVE1 and/or SLAVE2 Subscribes
  • Frame Slot C
    • Point-to-Point (Slave-to-Master or Slave-to-Slave) communications
      • SLAVE2 Publishes, MASTER and/or SLAVE1 Subscribes

Summary

A LIN cluster contains (at most) 1 node designated as the LIN-Master:

A LIN cluster contains up to 16 nodes designated as LIN-Slaves:

  • Contains a Slave Task which either:
Table of Contents

© 2017 Microchip Technology, Inc.
Notice: ARM and Cortex are the registered trademarks of ARM Limited in the EU and other countries.
Information contained on this site regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights.