Chapter 1 to 15 - MPLAB® Mindi™ Analog Simulator Hands On Workbook

Chapter 1 - Getting Started with the MPLAB® Mindi™ Analog Simulator

The MPLAB® Mindi™ Analog Simulator is a comprehensive tool for analog circuit design and analysis. It contains two simulation engines: SIMetrix (SPICE) and SIMulation of Piecewise Linear Systems (SIMPLIS).

This chapter is meant to be a quick start guide for using the MPLAB Mindi analog simulator to complete the exercises in the following chapters. It is not intended to replace the documentation and tutorials provided for the SIMetrix and SIMPLIS tools, which can be accessed from the 'Help' menu within MPLAB Mindi.

1.1 Running the MPLAB Mindi Analog Simulator

To start the MPLAB Mindi analog simulator, double-click on the desktop shortcut after installation or select Start > All Programs > Mindi 8.00. A splash screen will display the MPLAB Mindi analog simulator logo and brief licensing terms.

mindi-icon.png

After clicking OK on the splash screen, the MPLAB Mindi analog simulator graphical user interface (GUI) will appear and display the Welcome Page.

mindi-main-window.png

1.2 Setting the Update Schedule

We strongly recommended that you let the MPLAB Mindi analog simulator periodically check for updates to ensure that the simulator always has the latest patches, models, and example application schematics. The update schedule can be changed by clicking on Help > Check Updates Now… and setting the 'Automatic Update Schedule' to 'Daily', 'Weekly', or 'Monthly'.

mindi-update.png

1.3 Welcome Page Overview and Navigation

The Welcome Page has quick links for the following actions:

  • Create New / Open: Open or create a new schematic or symbol for SIMPLIS or SIMetrix from scratch.
  • MPLAB Mindi Support: Get help or more application schematics from Microchip Technology Inc.
  • Recent Schematics: Open recent schematics.
  • Application Schematics: Browse application schematics by category.
The Application Schematics panel can be used to browse the available example schematics by navigating through the product categories. The folder icon mindi-open-icon.PNG indicates another level of category hierarchy, whereas the MPLAB Mindi icon mindi-bottom-icon.PNG leads to a list of application schematics organized by part number. Faded icons represent categories that will contain application schematics in a future release.
mindi-application-schematic.JPG

During navigation, the hyperlinked breadcrumbs will show the entire navigation path back to the Welcome Page. This allows navigation back to any level of the hierarchy with a single click.

mindi-welcome-page-link.png
Application schematics are also preceded by icons that indicate which simulator engine is used for the particular schematic. SIMetrix files are marked by the SIMetrix-files-icon.png icon, whereas SIMPLIS files are indicated by the SIMplis-files-icon.png icon.

The application schematics can also be accessed via a folder tree by clicking on the 'File View' tab and navigating to the Microchip folder under SIMetrix or SIMPLIS.
file-view.png

1.4 Working with the Provided Application Schematics

All application schematics are copied to your local documents folder when the simulator is run for the first time. When modifying one of these schematics, we highly recommended that you save a copy of the file (using File > Save Schematic As…) immediately upon opening the schematic to avoid overwriting the default version.

Should you overwrite your local default schematics, copies can be found within the the simulator installation folder, which is typically located at
C:\Program Files (x86)\MPLAB Mindi_800\support\examples.

1.5 Creating a New Schematic

You can create a new schematic from File > New > SIMetrix/SIMPLIS Schematic or by using the 'Create New/Open' quick links from the Welcome Page.
Microchip models are available from the Place > From Microchip Library menu. The model list is organized according to product category, and only those models compatible with the currently selected simulator (SIMetrix or SIMPLIS) will be shown.

microchip-library.png

Many common components can be placed via the toolbar at the top or the 'Place' menu. Of particular note is the Probe category under the 'Place' menu, which will allow waveforms to be displayed during simulation.

common-components.png

All of the installed models can be viewed from the Place > From Model Library… menu, or by pressing the Ctrl +G key combination.

installed-models.png

1.6 Terminology

This section discusses some of the terminology used in the following chapters to describe or analyze the characteristics of the circuit being simulated. The specifics of each term may vary slightly from device-to-device, but the following attempts to generalize key concepts across a broad range of parts.

1.6.1 Start up from VIN

Start up from VIN refers to the behavior of the device or circuit when first powered. If the device has an enable pin, it is assumed that it is asserted simultaneously or prior to power up. The start-up time is typically measured from the rise of the input voltage to 90% of the steady-state output value, as illustrated in the following waveform.

vin-startup.png

1.6.2 Start up from ENABLE

Start up from ENABLE is the response of the circuit or device when an enable signal is asserted. It is assumed that the system has been properly biased and any settling times have been met prior to the enable signal being asserted. The start-up time, in this case, is typically measured from the edge (rising or falling, depending upon the required logic level) of the enable to 90% of the steady-state output value.

startup-enable.png

1.6.3 Load Transient Response

Load transient response is a term used to describe the capability of a converter to maintain its output voltage during a change in the load. Typically, this is specified by the output voltage undershoot and overshoot during a load step, as seen below.

load-transient.png

1.6.4 Power Supply Rejection Ratio (PSRR)

PSRR is a term widely used to describe the capability of an electronic circuit to suppress any power supply variations to its output signal. It is often expressed in decibels.

psrr.png

1.6.5 Continuous and Discontinuous Conduction

In power Supplies, Continuous Conduction Mode (CCM) is the operating region in which current flows through the inductor throughout the switching cycle. In Discontinuous Conduction Mode (DCM), the inductor current falls to zero for some portion of the switching cycle. The first half of the figure below depicts CCM. After the load current drops in the second half, the converter transitions to DCM operation.

conduction.png

1.6.6 Pulse Width and Pulse Frequency Modulation

Devices that feature the Pulse Frequency Modulation (PFM) run in this mode for light load conditions and for large input-to-output voltage ratios. This results in a higher efficiency over all load ranges. However, the device will switch into Pulse Width Modulation (PWM) at higher load currents and lower input-to-output voltage ratios. PWM-only operation is recommended for noise-sensitive applications, exhibiting a much lower output voltage ripple.

pwm-pfm.png

1.6.7 HyperLight Load

HyperLight Load (HLL) is a proprietary control loop; after the (constant) ON-time duration has expired, the control turns the high side switch OFF until the output drops below the threshold, which then triggers a new cycle. Using an NMOS low side switch instead of a diode allows for lower voltage drop across the switching device when it is on. In discontinuous mode, HyperLight Load is employed to regulate the output. This switching scheme improves the efficiency of the regulators during light load currents by only switching when it is needed.

1.6.8 Soft Start

Soft start reduces the power supply input surge current at startup by controlling the output voltage rise time. The input surge appears while the output capacitor is being charged up. A slower output rise time will draw a lower input surge current.

soft-start.png

1.6.9 Power Good

The Power Good (PG) output provides an indication of the output state of the device and is typically implemented as a comparator that trips when VOUT is below 90% of regulation voltage. The PG pin is commonly an open-drain output, which should be pulled up to the device power rail that is reading it.
The PG delay time is measured from the point at which VOUT reaches 90% of the regulation value and the rising edge of the PG output. The PG response time is measured from the point at which VOUT drops below 90% of the regulation value to the falling edge of the PG output.

1.7 Running the simulation

After opening a Microchip application schematic, you can run the default analysis by pressing the F9 key or by clicking on Simulator > Run Schematic.

run-simulation.png

The default analysis type is highlighted in the application schematic’s file name (e.g., MCP1623_AC_Load_Transient), and its parameters can be altered after opening the Choose Analysis window, which is available by pressing the F8 key or by clicking on Simulator > Choose Analysis.
If you want to run a user-created schematic, the analysis type and its parameters must be chosen first.

choose-analysis.png

The analysis options for SIMPLIS and SIMetrix are different, and the models are generally not compatible from one tool to the other. If you try to run a SIMPLIS schematic using the SIMetrix tool (or vice versa), the MPLAB Mindi analog simulator will issue a warning and highlight the incompatible components.

mindi-warning.png

1.8 Simulation results

You can monitor the status of the simulation and analysis in the simulation status window depicted below. During simulation, incremental waveform results will be displayed, if enabled. Note that not all stimulus components or probes are functional with every simulation/analysis type. For each analysis type selected, ensure that the proper probes and sources have been added to the schematic.

sim-results.png

The MPLAB Mindi analog simulator can perform time domain (waveforms) and frequency domain (Bode plot) analysis. A time domain simulation shows characteristics, such as response time and overshoot.

time-domain.png

While time domain analysis shows how a signal changes over time, frequency domain analysis shows how the signal’s energy is distributed over a range of frequencies.

frequency-domain.png

This frequency domain analysis produces the Bode plots. These plots include critical information regarding the circuit’s closed-loop stability, such as gain and phase margins.

Chapter 2 - MPLAB® Mindi™ Analog Simulator - Linear and LDO Regulator Models

This chapter introduces the simulation and analysis of Low Dropout (LDO) Regulators. In order to showcase the functionality of the parts, the MPLAB® Mindi analog simulator tool will be used.

2.1 Prerequisites

2.2 LDO regulator model experiments

The main objective of the following section is to study the behavior of linear regulators with the emphasis being on the dynamic response.

2.3 Case Study: The LDO Start-Up

2.3.1 Start-up from Vin

a

Download and open the “MIC5235-ADJ Startup” example schematic from the MIC5235 Analog Simulation software library.

b

Place a voltage probe on the net going to the VIN and EN pins, then double click it.

voltage-probe.png

c

Set the 'Curve Label' to VIN and the 'Graph name' to StartUp from VIN as seen on the image above.

d

Also change the 'Graph name' and 'Curve label' for the VOUT net probe, so that this waveform appears on the same graph.

e

Configure the voltage source, V1, as a single pulse with a width longer than the start-up time of the part, as seen in the figure below. Adding a delay for the pulse will make it easier to see the rising edge of the input voltage and the response of the LDO.

configure-voltage-source.png

f

Adjust the 'Stop time' parameter for the transient analysis to be longer than the start-up time, and then run the simulation to observe the response.

2.3.2 Start-up from Enable

The existing setup can easily be changed to measure the Start-Up from Enable behavior.

a

Cut the connection between EN and VIN.

b

Move the Voltage Source V1 from VIN to EN.

c

Place a second voltage source to supply VIN.

startup-from-enable.png

d

Run the simulation to observe the start-up response.

2.4 Case Study: Line transient response

2.4.1 Line Transient Simulation Examples

The main objective of this section is to show the dynamic response of the LDO and experiment with different test conditions. The setup used for the Start-Up from VIN can be changed in order to simulate the line step response of the part.

a

Change the minimum value of the pulse to a value equal to the output voltage + 1 V and the maximum to the stepped value (no more than the max input voltage parameter from the datasheet). Also, the pulse needs to occur after the part has entered into regulation, thus a delay higher than the start-up time is required.

b

The load current can be set by using a resistor. The resistor value can be replaced by the following syntax: { VOUT / IOUT } , where IOUT is the desired output current.

c

Run the simulation and select the waveform window with VIN and VOUT. Stacking the curves and zooming into the relevant section should produce the image below.

vin-vout.png

d

Change the values for load current and slopes for the input voltage. Analyze the differences between fast or slow slopes.

2.5 Case Study: Load transient response

2.5.1 Analyze Load Transient Response

a

Download and open the “MIC5235-ADJ Transient Load Step” example schematic from the MIC5235 Analog Simulation software library.

b

For this simulation, a current probe needs to be added before the load.

As seen in the figures below, cut the wire and insert an inline current probe. Label the curve as IOUT, and make sure that it plots on the same separate graph as VOUT.

current-probe-1.png
current-probe-2.png

c

Run the simulation, stack the curves, and zoom to better analyze the response. Press C to activate cursors to measure the undershoot and overshoot.

undershoot-overshoot.png

2.6 Case Study: Power Supply Rejection Ratio (PSRR)

2.6.1 Analyze the PSRR

a

Navigate to the MCP1700 Analog Simulation library, download and open the “MCP1700-12 Startup” example schematic.

b

Add a second voltage source in series with the existing one and set it as an AC voltage source with an AC Voltage of 200 mV, as seen below.

c

Add a Bode plot probe and connect it between the VIN and VOUT pins of the part.

psrr-simulation.png

d

Edit the Bode plot probe according to the figure below.

bode-edit.png

e

Configure the analysis type to AC Analysis, setting the desired start frequency to 1 Hz and stop frequency to 1 MHz.

f

Run the simulation and observe the resulting frequency response.

psrr-frequency-response.png

2.7 Case Study: Bode plots

2.7.1 Analyze the frequency response

a

For adjustable parts, the frequency response (gain and phase) can be measured. This can be achieved by inserting an AC Voltage Source between the VOUT and top resistor of the feedback loop as shown below.

bode-plot-simulation.png

b

Make sure to have gain and phase measurements enabled inside the 'Bode Plot Probe – with Measurements' probe. Also, for the PSRR measurement, you need to run an AC simulation.

gain-phase.png

2.8 References

Chapter 3 - MPLAB® Mindi™ Analog Simulator - Experiment: Driving MOSFETs

This chapter is intended to provide you with basic knowledge of driving MOSFETs in simple circuits. You will investigate when it is appropriate to directly drive a MOSFET versus using a MOSFET Driver integrated circuit. Guidance is also provided in designing gate drive circuits for various applications.

3.1 Prerequisites

3.2 MOSFET Driving Experiments

For these exercises, the gate of the MOSFET is viewed as a capacitive load. This gate capacitance is a parasitic effect proportional to the die size of the MOSFET. As the capacitance increases, the time required to fully charge the capacitor increases, resulting in slower switching times and potentially greater losses. A MOSFET driver can be used to provide greater drive current and/or higher voltages to optimize system parameters.

The goal of these case studies is to understand when using a MOSFET Driver is beneficial to your circuit and how to implement a simple, robust MOSFET gate drive solution. Later studies will cover tuning of gate drive circuits to adjust circuit timing, as well as control of transients due to parasitics.

3.3 Case Study: Basic Gate Drive Circuits

The most basic form of MOSFET gate drive circuit is an output directly from a micro-controller or PWM controller. In many low-power, low-frequency applications, this method is cheap, simple, and robust. Some potential shortcomings of this approach include:

a

Limited source and sink current

  • Increasing available current for charging the MOSFET’s gate produces faster switching times, reducing losses
  • Removing the burden of the gate drive power losses from the controller keeps the controller cooler

b

Limited gate drive voltage

  • Many controllers are limited to a 3.3 V or 5 V output
  • Increased gate drive voltages result in lower MOSFET on-resistances

c

Increased trace inductance

  • It may be challenging or undesirable to have the controller placed close to the MOSFETs, resulting in long gate drive traces
  • Increased inductance can increase switching times, as well as produce ringing which can cause electrical overstress

Utilizing a MOSFET Driver IC in series between the controller and the MOSFET can provide many advantages, giving you a vast selection of drive voltage and peak current levels, as well as reducing gate drive circuit inductance by allowing closer proximity of the driver and MOSFET.

3.3.1 Direct Drive Simulation Examples

a

Open the simulation MASTERS_Drivers_Direct.wxsch example by navigating to the MPLAB® Mindi™ Self-Paced Workbook Website.

b

Download the file named Chapter03.zip.

c

Unzip the folder to a known location and open MASTERS_Drivers_Direct.wxsch which is depicted below.

This simulation example is a simple boost converter circuit, where the ground referenced MOSFET is being driven by an output of a microcontroller or PWM controller. The boost converter circuit is open-loop for simplicity, and converts a 12 V input into an approximately 24 V output. The load resistance is 12 Ω, which will result in a ~2 A load. The switching frequency is set to 100 kHz.

boost-converter-circuit.png

After running the simulation, observe these various signals:

a

Drain-to-Source voltage of Q2, focusing on looking for overshoot/undershoot.

q2-undershoot-overshoot.png

b

Gate voltage of Q2, focusing on the rise and fall times of the gate drive signal.

q2-rise-fall-time.png

c

Gate drive current through resistor R3, focusing on peak source and sink currents.

r3-source-sink-current.png

d

Efficiency of the power-train, examined by using the Efficiency Calculator tool.

efficiency-calculator.png
efficiency-calculator-1.png

3.3.2 TC4427 MOSFET Driver Simulation Examples

a

Open the TC4427 application schematic under MOSFET and Motor > Low-Side > TC4427, as seen in the figure below.

The difference with the previous schematic is that a TC4427 MOSFET Driver was inserted in series between the controller and the MOSFET. A screenshot of the schematic is shown in the next figure.

mosfet-driver-simulatoin.png

b

To ensure accurate comparisons between the direct-drive example and this example, set the MOSFET (Q1) to IRL520N, the load resistance (R1) to 12 Ω, and the external gate resistance (R3) to 2 Ω.
After running the simulation, observe these various signals:

c

Drain-to-Source voltage of Q2, focusing on looking for overshoot/undershoot.

mosfet-driver-q2-undershoot-overshoot.png

d

Gate voltage of the MOSFET Q2, focusing on the rise and fall times of the gate drive signal.

mosfet-driver-q2-rise-fall-time.png

e

Gate drive current through resistor R3, focusing on peak source and sink current values.

mosfet-driver-r3-source-sink-current.png

f

Efficiency of the power-train, examined by using the built-in Efficiency Calculator tool.

efficiency-calculator-3.png
efficiency-calculator-4.png

Be sure to note the differences in rise time and fall time, as well as peak current, and efficiency when comparing the direct drive results to the TC4427 schematic results.

When all of the signals above have been investigated, replace the IRL520N MOSFET with the IRL530N MOSFET. It is important to note that the CISS value (Input Capacitance) for the IRL530 MOSFET is approximately double that of the IRL520N MOSFET, so the load on the gate drive circuit will be doubled. Observe the same signals and note how they compare to the previous values. Note if the efficiency has improved as well.

3.4 Case Study: Gate Drive Circuit Tuning

When is gate drive circuit tuning recommended?

There are always tradeoffs in circuit design and gate drive circuits are no exception. Driving MOSFETs faster using a strong gate drive can result in large transient voltages and ringing. Transients and ringing can usually be attributed to parasitics within the circuit such as packaging inductance, PCB trace inductance, parasitic capacitances, etc. These transients can lead to increased noise, as well as device damage if transients cause electrical overstress to a component.

In order to limit the severity of the transients, a resistor is commonly placed between the output of the MOSFET driver and the gate of the MOSFET. Note that this resistor is present on the simulation schematics used in the previous case study (R3). Selecting a value for this resistor is usually the result of experimentation with the actual hardware, and it can range from 0 Ω to over 100 Ω depending on the application and circuit parasitics. In some cases, it may be desired to have different amounts of gate damping resistance in the turn-on and turn-off paths. This can be accomplished by placing a diode and resistor parallel to the gate resistor.

In order to see the effects of various system parasitics, the MASTERS_Drivers_TC4427.wxsch simulation schematic can be modified as follows:

a

Add parasitic inductances at all terminals of Q2, as seen in the figure below. As a starting point, 10 nH can be used for all parasitic inductances.

add-inductance.png

b

Run the schematic and note the overshoot at the Drain-to-Source voltage of Q2.

c

Change the values of the parasitic inductances around the MOSFET, as well as the values of the damping resistors in the gate drive path, and re-run the schematic. The goal of this exercise is to see how parasitics that result from packaging, PCB layout, etc. can affect transients in the circuit.

parasitics-inductance.png

3.5 References

a

Datasheets

Chapter 4 - MPLAB® Mindi™ Analog Simulator - Peak Current Mode Step-Down (Buck) Converters

This chapter presents an introduction to the simulation of Microchip’s Peak Current Mode Step-Down (Buck) Converters. The following exercises will walk you through a number of exercises with multiple representative parts to observe characteristics, start-up from a rising input voltage, start-up from an enable, and start-up from output load steps. You will also explore Pulse Frequency Modulation (PFM) versus Pulse Width Modulation (PWM) operation and the boundary between them.

4.1 Prerequisites

4.2 Peak Current Mode Buck Converter

The goal of the following case studies is to understand the impact of the input voltage, the load current, and the passive components to the quality of the output voltage and stability, and to analyze PFM and PWM mode switching waveforms.

4.3 Case Study: Peak Current Mode Buck Converter Start Up

a

Open the 'Buck example, startup' application schematic from Power Management > Switching > MCP16301.

b

Place two voltage probes on VIN and EN, as seen on the next figure:

Peak-Current-Mode-Buck-Converter.png

c

Rename curve’s label as desired. In order to perform this task, double-click on probe’s symbol and use the same name for all graphs.

rename-label.png

d

Edit the parameters of each waveform generator, according to a specific test, if necessary.
Double-click on a component’s symbol to pop-up a window similar to what is presented below:

edite-parameter.png

e

Run the simulation and stack the curves when viewing the results.

f

Add cursors and move them around to measure the various timing parameters.

4.3.1 Additional Exercises

a

Perform the tests presented above both for MCP16311 and MCP16331 devices and compare the results.

b

Change RTOP, L1, and converter’s load (RLOAD) in order to get another output voltage (according to the datasheet). Run the simulation and compare the results.

4.4 Case Study: PFM versus PWM Switching Modes

a

Open the 'Synchronous Buck example, AC transient load step' application schematic from Power Management > Switching > MCP16311.

b

Ensure that the transient analysis type is selected.

c

Select and remove the 'Bode Plot Probe' and ‘AC1’ voltage source.

PFM-vs-PWM-Switching-Modes-Circuit.png

d

Connect RTOP with VOUT to close the feedback loop:

rtop-vout.png

e

Edit the parameters of the ‘ILOAD’ waveform generator. Chose ‘Sawtooth’ as the shape of the signal, because the PFM/PWM transition happens when the load current is increased to a certain point. The waveform’s period should not exceed simulation time, but should be comparable with it for accurate measurements. The amplitude of the signal should sweep from 0 to 200 mA, which is a value high enough to cover the occurrence of PFM/PWM transition (as presented in the datasheet):

iload-parameter.png

f

Change the parameters of ‘RLOAD’. In the following example, {5/0.01} means that at 5 V across the resistor, the current through it is 0.01 A (or 10 mA). This doesn’t mean that it forces converter’s output voltage to be 5 V. If the output voltage changes to 10 V (for example) and the value of the resistor remains unchanged, the current flowing through it will be double (10 mA at 5 V means 20 mA at 10 V, while keeping {5/0.01}). Instead of {5/0.01}, type the actual value of the resistance inside the ‘Result’ box which corresponds to 10 mA at 5 V, which is 500 Ω:

rload.png

g

Increase the simulation time to 10 ms to correspond with the ILOAD ramp time.

sim-time.png

g

Run the simulation and stack all curves.

i

Zoom into the area of interest and add cursors to find the load current (IOUT) where the converter transitions between PFM and PWM. This is indicated by a change in the output voltage ripple, as seen in the figure below:

iout.png

4.4.1 Additional Exercises

a

Change the value of the VIN and repeat this test several times to determine how this affects the load current threshold corresponding to PFM/PWM boundary.

vin-change.png

b

Change the values of RTOP, L1, and RLOAD to modify the output voltage (according to the datasheet) and compare the results.

4.5 Case Study: Load transient response

4.5.1 Analyze Load Transient Response

a

Open the 'Buck example, AC transient load step' application schematic from Power Management > Switching Regulators > MCP16331.

b

Run the simulation and stack the curves in the resulting waveform.

c

Add cursors to measure the undershoot and the overshoot, as depicted in the following image:

undershootovershoot.png

d

Switch to the AC analysis graphs to observe the frequency response of the converter, as illustrated below.

ac-analysis.png

4.5.2 Additional Exercises

a

Increase the load current and measure the output voltage undershoot/overshoot, Gain Crossover Frequency, and Phase Margin.

b

Change RTOP and L1. In order to get a different output voltage, re-run the simulation and compare the results.

c

Change the values of the output capacitors (as shown in the next screenshot), run the simulation again and compare the new results.

d

Perform the tests presented above for different switching regulators (MCP16301, MCP16311) and compare the results.

cap-change.png

4.6 References

c

MPLAB® Mindi™ Available Models:

  • MCP16301/H
  • MCP16311
  • MCP16331

Chapter 5 - MPLAB® Mindi™ Analog Simulator - COT Buck Regulators with External Ripple Injection

This chapter presents a few ordinary tests that can be performed using Microchip Constant-On-Time (COT) Buck Regulators with external ripple injection.

5.1 Prerequisites

5.2 COT Buck Regulators with External Ripple Injection experiments

The goal of these case studies is to understand:

  • the impact of input voltage,
  • load current and passive components to the quality of the output voltage during HLL and CCM modes,
  • startups in different loading conditions,
  • and the effect of the ripple injection circuitry and feedback resistors on the stability and load step response of the system.

5.3 Case Study: HLL/CCM Mode selection effects

The purpose of this section is:

  • to understand the HLL and CCM modes of operation,
  • to visualize the switching and output voltage waveform for each mode of operation and observe the transition between the two modes of operation.

The figure below shows the control loop timing during steady-state operation of a COT controlled power supply in CCM.

cot-operation.png

The figure below shows the control loop timing during steady-state operation of a COT controlled power supply in HLL.

control-loop-timing.png

5.3.1 Mode Simulation Examples

a

Open the '(MIC28515) Buck example, startup' application schematic from Power Management > Switching Regulators > MIC28515.

b

Remove PVDD, VDD, PG, EN, FREQ, EXTVDD, SVIN, VIN, BST, ILIM, FB, IVIN, ISVIN, ICIN1, ICIN2, Icout1 and Icout2 probes and restore connections where needed.

c

Rename them as desired and use the same graph name for each (eg: Switching).

switching-name.png

d

Add a waveform generator on MODE pin and edit its parameters as in the example below.

mode-pin-waveform-generator.png

e

Increase the simulation time to 25 ms and modify R2(Load resistor) value to 300.

f

Drag the cursors to measure the desired parameter, and zoom in the MODE transition to visualize different parameters. Note the Inductor current, Input Current Consumption and Output Voltage waveform.

5.4 Case Study: Start-up with High Load or High Output Capacitance

The purpose of this section is to understand the effect of high output capacitance or high load on the startup capabilities of a switching regulator. In this chapter, we will simulate the startup of the MIC28514 under different conditions and visualize relevant waveform.

5.4.1 Analyze Start-up Time

a

Open the '(MIC28514) Buck example, startup' application schematic from Power Management > Switching Regulators > MIC28514.

b

Remove PVDD, VDD, PG, EN, FREQ, EXTVDD, SVIN, VIN, BST, ILIM, FB, IVIN, ISVIN, ICIN1, ICIN2, Icout1 and Icout2 probes and restore connections where needed.

c

Rename them as desired and use the same graph name for each.

d

Modify the value of the C15 output capacitor to 5 mF.

e

Simulate with the initial SS cap. Visualize what happens to the output voltage.

f

Modify the SS cap value in order to increase the startup time two times and then simulate again and observe the differences in startup.

5.5 Case Study: Stability and Load Step Response for COT Devices with Pure Ripple from the Feedback Resistors

What is the effect of the feedback resistors?

The values of FB resistors should be in kΩ range to avoid noise pick up from switching. If the value of FB resistors is high, noise can couple to FB node and ride on top of ripple which will cause multi pulsing and stability issues. We recommend choosing upper FB resistors in the range of 10kΩ and select lower FB resistors based on the required output voltage.

5.5.1 Analyze the stability and load step response

a

Open the '(MIC28514) Buck example, AC Transient load step' application schematic from Power Management > Switching Regulators > MIC28514.

b

Remove R15 resistor and C10 capacitor from the schematic.

c

Modify C1 capacitor value to 1.8 nF, C12 ESR to 30 mΩ and Quantity to 1 and C15 ESR to 50 mΩ and value to 470 µF.

d

Remove PVDD, VDD, PG, EN, FREQ, EXTVDD, SVIN, VIN, BST, ILIM, FB, IVIN, ISVIN, ICIN1, ICIN2, Icout1, and Icout2 probes, replacing inline probes with wires.

e

Rename them as desired and use the same graph name for each.

f

Simulate the setup. Visualize what happens to the output voltage during load transient.

g

Switch between graphs to visualize the AC response.

5.6 Case Study: External Ripple Injection Effect on Stability and Load Step Response for COT Devices

The VFB ripple required for proper operation of the internal gm amplifier and comparator is 20 mV to 100 mV. However, the output voltage ripple is generally designed as 1% to 2% of the output voltage. For low output voltages, such as 1 V, the output voltage ripple is only 10 mV to 20 mV and the feedback voltage ripple is less than 20 mV. If the feedback voltage ripple is so small that the gm amplifier and comparator cannot sense it, then the switcher loses control and the output voltage is not regulated. In order to have sufficient VFB ripple, a ripple injection method should be applied for low output voltage ripple applications. Additional ripple can be injected into the FB pin from the Switching Node, via a resistor RINJ and a capacitor CINJ as shown in the figure below.

vfb-ripple.png

The injected ripple can be calculated with the following formula:

ripple-injection-formula.png

5.6.1 Analyze External Ripple Injection with Stability and Load Step Response

a

Open the '(MIC28514) Buck example, AC Transient load step' application schematic from Power Management > Switching Regulators > MIC28514.

b

Remove PVDD, VDD, PG, EN, FREQ, EXTVDD, SVIN, VIN, BST, ILIM, FB, IVIN, ISVIN, ICIN1, ICIN2, Icout1, and Icout2, replacing inline probes with wires.

c

Rename them as desired and use the same graph name for each.

d

Simulate the setup. Visualize what happens to the output voltage during load transient.

e

Switch between graphs to visualize the AC response.

f

Modify the External Ripple Injection resistor (R15) value to 25 k and simulate again and observe the differences for load transient and AC response.

g

AC response with different external Rinj values(16.2 k vs 25 k):

ripple-frequency-response.png

h

Load Step response with different external Rinj values(16.2 k vs 25 k):

load-step-response.png

5.7 References

Chapter 6 - MPLAB® Mindi™ Analog Simulator - COT Regulators with Internal Ripple Injection

This chapter presents some fundamental characteristics of Constant On Time (COT) Step-Down converters and their advantages.

6.1 Prerequisites

6.2 COT Buck Converter Experiments

The goal of the following studies is to demonstrate the characteristics and benefits of the COT architecture and to help you optimally design your power supply application.

As an example of a COT Buck Converter with internal ripple injection, MIC23155 simulations will be elaborated in the following case studies.

6.3 Case Study: Switching Frequency Dependence upon Input Voltage and Load

6.3.1 Switching Frequency dependence over VIN

The COT architecture does not have an oscillator to control the switching frequency; however, the unique architecture maintains the frequency fairly constant with input voltage variation.

a

Open the '(MIC23155) Buck example, startup' application schematic from Power Management > Switching Regulators > MIC23155.

b

Double-click the power supply and set the Final Voltage to 2.8 V

switching-frequency-dependence.png

c

Run the simulation, select the 'Simplis_tran SW' graph, and stack the curves.

d

From the Measure menu, select 'Frequency'.

e

The switching frequency should be about 2.15 MHz. To see the PWM signals, zoom in the SW/V area by drawing a small rectangle.

215MHz.png

f

Edit the input power supply again and set the Final Voltage to 5.5 V.

g

Repeat the same steps and measure the switching frequency. It should be about 2.68 MHz.

268MHz.png

6.3.2 Switching Frequency dependence over Load

In order to achieve good load regulation, the Constant On Time converter must adapt its switching frequency according to loading. Thus, heavier loading translates into a higher frequency (limited to about 4 MHz).
switching-frequency-vs-output-current.png
Inductance selection also plays an important role in the resulting switching frequency. A low inductance (0.47 µH) produces higher peak inductor current that leads to lower switching frequency. A high inductance (2.2 µH) produces lower peak inductor current that leads to higher switching frequency.

ipeak-formula.png

To simulate the switching frequency variation load dependency:

a

Open the '(MIC23155) Buck example, AC transient load step' application schematic from Power Management > Switching > MIC23155.

b

Double click on the ILOAD symbol and configure a slow load ramp, according to the picture on the next page.

slow-load-ramp.png

c

Run the simulation, select the 'simplis_tran SW' graph, and stack all curves.

d

Add a new probe using the 'More Probe Functions' menu and select 'Frequency' from the 'Per Cycle Voltage Measurement' group.

e

Close the pop-up message, select the 'SW'
node for frequency measurement.

f

The curve generated shows the frequency correlation with the load current and inductor current. As the inductor current increases, so does the switching frequency.

iload-inductor-current.png

6.4 Case Study: Switching Pattern in Various Modes of Operation

6.4.1 No Load and Light Load Operation

The diode-emulation operation of the NMOS allows the control loop to work in discontinuous mode for light load operations. In discontinuous mode, the MIC23155 works in HyperLight Load to regulate the output. As the output current increases, the off time decreases thus provides more energy to the output. This switching scheme improves the efficiency of MIC23155 during light load currents by only switching when it is needed.

To simulate the switching pattern at HLL vs. CCM (Continuous Conduction Mode):

a

Open the '(MIC23155) Buck example, AC transient load step' application schematic from Power Management > Switching Regulators > MIC23155.

b

Double-click 'RLOAD' and reduce current to 0.05 A (to ensure HLL operation).

rload-current.png

c

Plot the 'SW' on the 'OUTPUT' graph, on a separate grid.

sw-output.png

c

Run the simulation and select the 'simplis_tran VOUT'
graph.

simplis-tran-VOUT.png

Two operating regions appear distinctive: at low loading (50 mA) being in DCM (Discontinuous Conduction Mode) the switching frequency is greatly reduced (bringing improved efficiency).

low-frequency.png

With higher output ripple; at higher loading (300 mA), the device enters CCM and the output ripple is minimized.

high-frequency.png

6.4.2 HLL to CCM transition. Choosing the right inductance value

As can be seen above, HLL operation has the benefit of increased efficiency with the cost of higher output ripple and a frequency highly dependent on loading. On the other hand, in CCM the device benefits from reduced output ripple and pseudo-fixed frequency. Thus, you might want to personalize these trade-offs, to push for higher efficiency or force the device to CCM at lighter loads. This can be adjusted by selecting the appropriate inductance value by using the following formula:

inductor-value-formula.png

To simulate with different inductance values:

a

Open the '(MIC23155) Buck example, AC transient load step' application schematic from Power Management > Switching Regulators > MIC23155.

b

Reduce the RLOAD current to 0.05 A (typically meaning HLL operation).

increase-inductor-value.png

c

Double click the inductor and increase the inductance to 2.2 μH.

increase-22uH.png

d

Plot the 'SW' on the 'OUTPUT' graph, on a separate grid.

e

Run the simulation and select 'simplis_tran VOUT' waveforms.

f

Although the load toggles between 50 mA and 300 mA, the increased inductance now keeps the device in CCM even at 50 mA. Zooming in on the load step between 300 mA and 50 mA gives the waveforms below.

increased-inductance-output.png

g

The MIC23155 switches with pseudo-constant frequency at 300 mA and 50 mA. When stepping to a lighter load, the device pauses switching until the output capacitor discharges to an undervoltage that retriggers switching.

6.5 Case Study: Load Transient Response

6.5.1 COT advantages

The COT architecture relies on a fast comparator to detect a drop in the output voltage, and as soon as the output voltage falls below the regulation threshold, a new ON-time pulse is generated for correcting the voltage deviation.

The response time to a load transient is therefore much faster when compared to other control methods. For example, a fixed-frequency method might have to wait up to a full clock cycle before applying the corrective action, in the form of a longer duty cycle. The concept is shown in the figure below.

cot-response-time.png

To simulate the operation in load transient:

a

Open the '(MIC23155) Buck example, AC transient load step' application schematic from Power Management > Switching Regulators > MIC23155.

load-transient-circuit.png

b

Set the current source, ILOAD, to a pulse of 500 mA.

c

Set the RLOAD resistor to {1.8/0.25}. This makes the load transient more evident.

rload-change.png
rload-change-2.png

d

Run the simulation, and view the transient results, simplis_tranX VOUT(Y1).

simplis-tranX-VOUT-Y1.png

e

Go back to the Schematic window and select the Interactive Voltage Probe, then click on the 'SW' and 'FB' nets to add the waveforms.

interactive-voltage-probe.png

f

Go to the Waveform Viewer window, then click in the Menu Axes > New Grid to add another grid to the window. Then select the U1-FB (Y1) waveform, in the menu click Curves > Move Selected Curves to move it to the newly created grid. Zoom on the grids to focus on the region where the load transient takes place (around 20 μs). You should see a region similar to this one below:

U1-FB-Y1.png

g

Please note that all valleys of the U1-FB(Y1) waveform are neatly aligned to the 620 mV value. This is indeed the threshold of the comparator that triggers the ON-time pulse.

h

We will see soon that all the rising edges of the U1-SW(Y1) waveform are indeed aligned to the threshold crossing of the FB waveform, with a small delay due to the comparator and internal driver stages.

i

On the Waveform Viewer window, click in the menu, then Cursors > Toggle On/Off to turn on the cursors. Then drag them in correspondence to the valleys of the U1-FB(Y1) waveform just before the load transient. Note the period value (around 371 ns) and that the U1-SW(Y1) waveform goes high each time the U1-FB(Y1) waveform hits the regulation threshold (620 mV). By moving the A cursor to the falling edge of the SW waveform following the REF cursors, you’ll be able to measure also the SW ON-time which is around 210 ns.

SW-ON-time.png

j

Now move the REF cursor on the SW rising edge at 20.77 us, so just after the load transient, and move the A cursor to the subsequent SW rising edge. You’ll see that the switching period is smaller, measuring around 317.6 ns. It is noticeably shorter than the previously measured switching period.

k

Again, measure the ON-time of the switching cycle under consideration. It is still very close to 210 ns. So there has been no change in the ON-time, and the period change is entirely due to the reduction of the OFF time.

switching-cycle-on-time.png

This example shows the mechanism of the COT to correct load transient voltage deviations. A new ON-time is immediately triggered as soon as the FB voltage drops below the regulation threshold. There is virtually no delay in the corrective action, except very small internal delays (due to comparator and driver stages). Also, please note that the ON-time pulse is NOT modulated. During the load transient, the ON-time stays constant—with very good approximation—as long as the input voltage is constant and the output voltage deviation is small. To increase the inductor current to the new level demanded by the load, the OFF-time is shortened.

Therefore, COT control exhibits some frequency variation during the load transient. Here, we’re seeing some instantaneous increase in the pulse FREQUENCY, while a fixed-frequency control method would react to the load transient with an increase of the pulse WIDTH. However, before the new wider pulse can be applied, the fixed-frequency control has to wait for the next clock cycle. There is no such a limitation in COT control.

COT control might have OTHER types of limitations. For example, the OFF-time can only be reduced to a minimum value, but not completely eliminated. This is also the case for MIC23155, and the reason for that is, the current sensing is done on the synchronous (aka low-side) switch. To read the current signal across the RDS(ON) of the low side switch, it must be turned ON at every switching cycle for some minimum amount of time after the high-side switch has been turned OFF. Therefore the duty cycle cannot go to 100%. As stated in the MIC23155 datasheet, the maximum achievable duty cycle is 80%.

This type of behavior (saturation of the duty cycle) can be observed in simulation by exacerbating the load transient even further (e.g. by increasing the pulsed level of the ILOAD current source up to 1 A).

6.5.2 Tweaking the loop gain and transient response using the feed-forward capacitor (CFF)

As can be seen in the previous studies, the simulation also includes an AC analysis, whose results are displayed in this Waveform Viewer tab:

cff-ac.png

The Bode plot shows a gain margin of approximately 68° and a cross-over frequency around 428 kHz.

a

Modify the original circuit by adding a small capacitor (10 pF) in parallel to the top feedback resistor R1. To improve convergence time, add an initial condition, which is equal to the difference between the output voltage VOUT (approximately 1.83 V) and the feedback voltage FB (approximately 0.62 V) at the beginning of the simulation, thus 1.83 V-0.62 V=1.21 V.

10pf.png

b

Run the simulation again and look at the new AC analysis results. We can note that the crossover frequency has been increased (now around 631 kHz) while the phase margin has slightly diminished (now around 62°), but it is still quite healthy.

new-ac.png

If we look at the transient response, we can note several points:
First, the output voltage deviation during the load transient has significantly improved. Without C4, the voltage deviation (measured using cursors) is around 22.3 mV. With C4, the voltage deviation is only around 15.3 mV.
Second, the regulation target value of VOUT has slightly decreased (by around 10 mV).

voltage-deviation.png
vout-decreased.png

By adding C4, we created an AC path that couples the VOUT voltage directly to the feedback node. This way, the transfer of AC perturbations on the VOUT to the FB node is enhanced, and a faster reaction to load transient is to be expected. This is quite intuitive.

However, explaining the decrease in the target regulation voltage is not so easy. To better understand this change, we look at the FB node waveforms. It can be observed that the valleys of the FB ripple waveform are in both cases regulated to 0.62 V. But the peak-to-peak ripple with C4 in place is lower than without C4. Thus, the average value of the FB ripple waveform is lower when C4 is there.

This also explains the small deviation observed between the actual VOUT average value and the theoretical output voltage value, calculated by using the resistor divider ratio R1/R2 and the nominal FB Regulation Voltage (0.62 V in the datasheet):

vout-nom-equation.png

By reducing the peak-to-peak ripple of the FB waveform we get closer to the nominal target output voltage.

reduced-ripple.png

The triangular wave-shape of the FB ripple is created by a suitable internal ripple injection network, shown in RED in the figure below. For proper operation, the control (FB) ripple has to be in phase with the inductor current. The ripple on the VOUT waveform cannot satisfy this constraint if very low ESR output capacitors are used.

The impedance of the internal ripple injection network is very high, which requires that the feedback resistor divider be high impedance. C4 must also be comparable to the internal impedances (pF range). Otherwise, the internal ripple injection becomes ineffective.

internal-ripple-injection-network.png

Finally, see what happens if C4 is increased too much (220 pF). The “out-of-phase” ripple of the VOUT waveform is strongly coupled to the FB node, while the internally injected “in-phase” ripple is completely overwhelmed. The MIC23155 becomes unstable.

out-of-phase-ripple.png

6.6 Case Study: Programming Soft-Start

To see how adjustable soft-start can improve the inrush current at turn-on:

a

Open the '(MIC23155) Buck example, startup' application schematic from Power Management > Switching Regulators > MIC23155.

b

Change the value of the output capacitor C2 to 47 μF.

c

Change the value of the load resistor RLOAD to {1.8/0.25}

d

Run the simulation and view the results.

e

In the Waveform Viewer, select the VOUT waveform, then Measure > Rise Time.

f

Then select the IVIN waveform on the 'VIN' tab and 'Maximum'.

softstart-vout.png
vout-rise-time.png

Here we can observe that the maximum of the Input supply current is very high, then it stabilizes to a significantly lower value. The maximum is in correspondence of the onset of the VOUT ramp, where the slope across the output capacitor is maximum. We also measure the maximum current through the output capacitor:

max-current-output-cap.png

Allowing for such a large inrush current is not a good design practice, because large inrush currents over-stress the application, especially if it is frequently exercised through ON/OFF cycles. Also, if associated with lower input voltages and/or source impedances, large inrush current may cause false startups.

Luckily enough, we can easily solve the problem since the MIC23155 has provision for adjustment of the soft-start time.
Going back to the schematic:

a

Select 'C3' and change its value to 1.5 nF.

b

Run the simulation to see the result.

On the Waveform Viewer, we can see the results of both simulations. For more clarity, only the waveforms of interest for measurements are retained. Notice that the VOUT rate of rise has slowed down significantly.

vout-comparison.png

Also the maximum values of the input supply current and of the output capacitor current have significantly diminished.

input-current-decrease.png
output-cap-current-decreased.png

6.7 References

a

Datasheets

Chapter 7 - MPLAB® Mindi™ Analog Simulator - Peak Current Mode Step-Up (Boost) Regulators

This chapter aims to provide a practical introduction to Peak Current Mode Control Step-Up (Boost) Converters. Also, the MPLAB® Mindi™ analog simulator tool will be used in several examples to demonstrate the functionality and the performance of Microchip’s Boost DC-DC devices.

7.1 Prerequisites

7.2 Peak Current Mode Control Boost Converter Experiments

The goal of this case study is to understand the impact of input voltage, load current and passive components on the quality of the output voltage, stability, and analyze PFM and PWM mode switching waveforms.

7.3 Case Study: Peak Current Mode Control Boost Converter Start-Up

MPLAB Mindi analog simulator provides start-up examples for several parts from Microchip’s boost portfolio, allowing any of them to be used for testing purposes. In this section, MCP1640 will be used for this test, but the procedure is similar for the other parts.

a

Open the '(MCP1640) Synchronous boost example, startup' application schematic from Power Management > Switching Regulators > MCP1640.

b

Delete the waveform generator from the EN pin and tie EN to VBATT.
Set output voltage to 3.3 V with the feedback resistors RTOP and RBOT.

rtop-equation.png

c

Set output current to 0.025 A by editing the load resistor : {3.3/0.025}.

d

Run the simulation and view the results.

Peak-Current-Mode-Buck-Control-sim-results.png
Peak-Current-Mode-Buck-Control-sim-results-2.png
Peak-Current-Mode-Buck-Control-sim-results-3.png

7.3.1 Additional Exercises

a

Pulsing ENABLE: this test consists in applying a square signal on the EN pin. The frequency of this signal and the simulation time have to be chosen while considering the converter’s start-up time.

frequency-change.png

b

EN Thresholds: this test consists of applying a triangular signal on the EN pin. The frequency of this signal and the simulation time have to be chosen considering the start-up time of the converter. The relevant voltage probes can be altered such that they are plotted on the same graph.

en-threshold.png

7.4 Case Study: PFM and PWM Switching Modes

The MCP16251/2 devices use an automatic switchover from PWM to PFM mode for light load conditions. During PFM mode, a controlled peak current is used to pump the output up to the threshold limit. While operating in PFM or PWM mode, the P-Channel switch is used as a synchronous rectifier, turning off when the inductor current reaches 0 mA, in order to maximize efficiency. In PFM mode, a comparator is used to terminate switching when the output voltage reaches the upper threshold limit. Once switching has ended, the output voltage will decay or coast down. During this period, which is called Sleep period, 1 µA (typically) is consumed from the input source, which keeps power efficiency high at light load (4 µA are consumed from the output). PFM mode has higher output ripple voltage than PWM mode and variable frequency. The PFM mode frequency is a function of input voltage, output voltage and load current. While in PWM mode, the boost converter periodically pumps the output with a fixed switching frequency of 500 kHz.

a

Open the '(MCP16251) Synchronous boost example, startup' application schematic from Power Management > Switching Regulators > MCP16251.

b

Modify the schematic in such a way that the PFM-PWM threshold can be determined. For this setup, the output current has to be linearly increased; this can be done using a PWL Current source.

out-current-change.png
pfm-output.png

The advantage of PFM operation is low input current consumption at light loads (high efficiency). The tradeoff is the higher output voltage ripple (~100 mV), as seen in the previous graph compared to the PWM ripple at about 20-30 mV.

pfm-threshold.png

7.5 Case Study: Maximum output current

a

Open the '(MCP1642B-ADJ) Synchronous boost example, startup' application schematic from Power Management > Switching Regulators > MCP1642.

b

Add a PWL current source to program the output current accordingly for this test.

pwl-current-source.png

c

Run the simulation and observe the results.

pwl-sim-result.png

7.6 Case Study: Power Good signal

a

Open the '(MCP1642B-ADJ) Synchronous boost example, AC transient' schematic from Power Management > Switching Regulators > MCP1642.

b

Edit the schematic as shown below:

power-good-circuit.png

c

Run the simulation and observe the generated waveforms, as seen below.

power-good-sims.png

7.7 Case Study: Load Transient Response

a

Open the '(MCP16251) Synchronous boost example, AC transient load step' schematic from Power Management > Switching Regulators > MCP16251.

b

Change CIN to 10 µF, and set RLOAD to {3.3/0.005}, 5 mA.

c

Set the load step to 45 mA by modifying I1 : Delay=500 us and Pulse=45 mA.

d

Increase simulation time to 3 ms, uncheck POP and AC, and run the simulation.

transient-load-sim.png

7.8 References

Chapter 8 - MPLAB® Mindi™ Analog Simulator - Peak Current Mode Control Buck-Boost Converters

This chapter demonstrates the functionality and the performance of Microchip’s monolithic Buck DC-DC devices used in a buck-boost system, the MPLAB® Mindi™ analog simulator tool will be used in several examples.

8.1 Prerequisites

8.2 Buck-Boost Converter Experiments

The goal of these case studies is to understand the impact of input voltage and load current on the overall converter performance. There are applications in which a simple switching converter will be able to output a constant voltage (in this example 12 VDC) while input voltage is either below, close to, or above the required output.

The proposed examples to analyze include a typical MCP16301 step-down (buck) converter application with the addition of a logic-level NMOS transistor, a gate driver, an extra Schottky diode and few passives. For simulation with MPLAB Mindi analog simulator, the integrated gate driver (from the below schematic used for ADM00399 Evaluation Board) was replaced by a pair of bipolar transistors in totem pole configuration.

buck-boost-circuit.png

8.3 Case Study: MCP16301 used as buck-boost regulator

The goal of this section is to understand and analyze the MCP16301 in a buck-boost topology. Performing separate simulations for each input voltage to verify output voltage regulation is a tedious and unnecessary task if we consider the capability of MPLAB® Mindi™ to sweep certain parameters on-the-fly. Efficient use of the simulator can reduce the effort to only a couple of simulations during the preliminary application design.

8.3.1 MCP16301 Buck-Boost simulation

a

Open the '(MCP16301/H) Buck example, startup' schematic from Power Management > Switching Regulators > MCP16301. The next steps modify this standard buck topology schematic to the buck-boost configuration seen below.

MCP16301-Buck-Boost.png

b

Remove VEN supply, and tie EN to VIN.

c

Set RLOAD to the minimum output current (80 Ω in this case).

d

Increase the inductor’s inductance to 47 uH.

e

Place a Zener diode (BZX84-7V5) in series with the bootstrap diode.

f

Place a FDMA3028N NMOS Power FET, Q1 in the following figure.

g

Place the NPN (Q2N2222) and PNP (MMBT2907) bipolar transistors to be used as totem pole gate driver. For the NPN, click on Search under the Place > Semiconductors > NPN menu. Similarly, find the PNP.

h

Place two identical 2 kΩ resistors as divider for the gate driver.

i

Copy and paste the Schottky diode (B140) as a rectifier for the buck-boost output.

j

Edit RTOP according to the desired output voltage (140 kΩ for a 12 V output).

k

Place a voltage probe on VIN and set it to display using a separate grid and graph (named OUTPUT).

l

Alter the VIN source to step from 5 V to 30 V with a 50 ms rise time and no delay.

m

Place a “Voltage Controlled Current Source with Limiter” (U2 in the previous figure) setting the Gain to 20m, the minimum output to , and the maximum output to 13.

n

Run a transient analysis with a Stop time of 50 ms.

o

Stack all curves to view the results. Compare them to the similar graphs in the “MCP16301 High Voltage Buck-Boost Demo Board User’s Guide”.

Buck-Boost-sims.png

The input voltage sweeps from 5 V to 30 V while simultaneously increasing the load current from 250 mA to 750 mA. Throughout the sweep, the output voltage remains in regulation.

8.3.2 Testing the application output regulation when powered by a car battery supply and with a stepping load

a

First we must change the input voltage range according to the car environment, as below.

input-voltage-change.png

The battery internal resistance is not included in this simulation. If you know the value of the battery internal resistance, you must add it on the schematic in series with the input voltage supply!

b

Delete the controlled current source, U2, and replace it with a current source.

delete-current-source.png

c

Run the simulation and stack the three plots for VIN, VOUT and IOUT. Zoom as needed.

car-battery-outputs.png

These plots demonstrate that for this input range, a load variation from 150 mA to 500 mA keeps the output overshoot and undershoots in an acceptable region of less than five percent. As expected, in the 500 mA load region the output ripple is a bit higher.

8.3.3 Additional Exercises

Observe the inductor current ripple and maximum values by adding an inline probe.

inductor-current-ripple.png

8.4 References

c

MPLAB Mindi Analog Simulator Available Models

Chapter 9 - MPLAB® Mindi™ Analog Simulator - Peak Current Mode Step-up LED Current Regulators

This chapter presents an introduction to Microchip’s Peak Current Mode Step-Up (Boost) Converters for driving LEDs in lighting applications. The goal of these case studies is to understand the impact of the input voltage, load current, and passive components to the quality and stability of the output current.

9.1 Prerequisites

9.2 Case Study: LED Dimming with a Constant Current PWM Regulator

The MCP1643 regulates current by sensing the voltage across a shunt resistor in series with the LEDs. The EN pin can be used for LED dimming by driving it with a variable duty cycle PWM signal, as seen in the figure below on the left. By varying the duty cycle, the average LED current changes proportionally, as shown in the figure below on the right.

led-dimming-pwm-regulator.png

9.2.1 LED brightness with PWM Dimming

a

Open the 'Synchronous boost example, Generic LED dimming' application schematic from Power Management > Switching Regulators > MCP1643.

b

Edit the source driving the EN pin to match the figure to the right.

c

Change the LED current by modifying RLOAD1 to be 0.12/200 m, which is the 0.12 V internal reference divided by the desired 200 mA LED current.

en-pin.png

d

Run a transient analysis with a stop time of 3 ms and use the cursors to measure key parameters.

led-dimming-pwm-sim.png

e

From the Measure > Mean/cycle menu, determine the mean LED current.

measure-mean-cycle.png

9.2.2 Additional Exercises

a

Repeat this simulation with different VEN source parameters, such as duty cycle and frequency, and find the value of the mean/cycle ILED output current.

b

Adjust the value of RSET and rerun the simulations to observe the LED current.

The goal of this section is to understand how Output Overvoltage Protection works with the MCP1643. Overvoltage protection is designed to save the MCP1643 if the output voltage exceeds 5.0 V. If the load is disconnected (an LED fails), the output voltage increases rapidly, because this topology is regulating the current, which is 0. The protection circuit trips, stops the switching, and periodically monitors the output to verify that the fault is still present.

This feature does not protect the LED. An optional Zener diode can be added between VOUT and VFB pins to clamp the output voltage and protects the LED against excessive voltage and current. The MCP1643's response to open load event is presented in the below waveform:

Output-Overvoltage-Protection.png

a

Open the 'Synchronous boost example, startup' application schematic from Power Management > Switching Regulators > MCP1643.

b

Remove the wire between the Cathode of DLED1 and RLOAD.

c

Choose the transient analysis with a stop time of 20 ms and run it.

DLED1-RLOAD.png

d

Using cursors, measure VOUT and identify where the limitation occurs. Notice the waveform shape corresponding to the periodic restart attempts.

mcp1643-vout.png

9.4 Case Study: LED Model Experiments

The goal of this section is to improve your ability to include LEDs in simulations. A real LED is a two-pin nonlinear semiconductor device, as seen in the figure to the right. Each LED has slightly different characteristics, which makes modeling the nonlinearity challenging.

LED-Model-Experiments.png

The MPLAB Mindi Analog Simulator LED model utilizes a PWL block, which can be customized based either upon the LED’s datasheet or parameters obtained by characterizing the device. The nonlinear curve is approximated by linear segments that are defined by a table of vertices. The model accuracy can, therefore, be controlled by the number of segments.

The LED model included in the MCP1643 example schematics can be easily placed into other device’s schematics as long as the LED model block in the same folder is copied as well.

What you need for customizing the LED model is the I/V graph from its data sheet as shown in the example below. This is for an XLAMP7090XRE LED type.
To update the default model with the custom LED's data:

a

Open the 'Synchronous boost example, steady state' application schematic from Power Management > Switching Regulators > MCP1643.

b

Edit the LED parameters and click on the 'LED V-I Curve' tab to bring up the window below.

c

As mentioned above, the accuracy of the model depends on how many segments the I/V curve is made of. The default value is 10 segments. The first point is the reverse current, the second one is the zero point for both voltage and current, and then the actual forward drop / direct current data begins.

d

With all segments entered, it is recommended to validate the LED model in a separate setup before the actual schematic is created. This is easily done by preparing a very basic test schematic in MPLAB Mindi analog simulator. It should include a variable voltage source, a current probe, and a voltage probe, as seen in the following figure:

led-model.png
led-edit-waveform.png

e

Choose transient analysis with a stop time of 10 ms and run it. When the graphs are plotted, stack the curves to observe the following figure:

f

The resulted graph looks quite similar to the one in the datasheet, where the input values were taken from. Now the LED Model is ready to be placed in the real schematic.

led-output.png

9.5 References

a

Datasheets

Chapter 10 - MPLAB® Mindi™ Analog Simulator - High Voltage Sequential Linear LED Drivers

The goal of this chapter is to understand how to use and analyze Sequential Linear LED drivers. MPLAB® Mindi™ will be used to investigate the impact of the input voltage, number of LEDs in each TAP and their configuration (series or parallel), Total output LED current (shape and stability), and Total Lumen Power.

10.1 Prerequisites

10.2 Case Study: CL8800 LED Driver Input Voltage and tap configuration

The goal of this section is to understand start up from input voltage (VIN) by using MPLAB Mindi analog simulator.

a

Open the 'Sequential Linear LED Driver' application schematic from Power Management > High-Voltage LED Drivers > CL8800.

b

Add a Differential Voltage Probe, VIN_LINE, on the input voltage.

c

Set VIN=120 VAC (Sine, F=60 Hz, Initial= -120*1.414, Pulse= 120*1.414).

CL8800-LED-Driver-Sim.png

d

Set VIN=135 VAC (Sine, F=60 Hz, Initial= -135*1.414, Pulse= 135*1.414).

CL8800-LED-Driver-135v.png

e

Repeat the simulation with the input line voltage set to 90 VAC, the lowest allowed line voltage. It is the minimum voltage to allow all LEDs from TAP1 to TAP4 to turn on (the LEDs from TAP5 are off).

10.2.1 Start-up Simulation Examples

The goal of this section is to understand how to modify the number of the LEDs for each TAP and to observe the impact. A string of series/parallel LEDs is tapped at six locations, allowing various configurations of LEDs. Six linear current regulators sink current at each tap and are sequentially turned on and off, tracking the input sine wave voltage.
NS = the number of LEDs in series. NP = the number of LEDs in parallel.

a

Open the 'Sequential Linear LED Driver' application schematic from Power Management > High-Voltage LED Drivers > CL8800.

b

Set DSEG1 to NS=2, NP=1. Total Lumens: 1098.

startup-sim.png

c

Run the simulation and observe the resulting waveforms.

CL8800-LED-Driver-Sim-1098.png

d

Set DSEG1 to NS=3, NP=1. Total Lumens: 1050.

e

Run the simulation and observe the resulting waveforms.

CL8800-LED-Driver-Sim-1050.png

10.2.2 Additional Exercises

a

Modify DSEG1 LEDs to NS=1, NP=1 and DSEG2 LEDs to NS=2, NP=2.

b

What is the resulting total lumens and LED current?

10.3 Case Study: Using LEDs or Zener Diodes on the Higher Taps

The goal of this section is to show how to reduce the cost of the application while still maintaining the same performance. With each schematic modification, the LED current and IC power will be measured.

a

Open the 'Sequential Linear LED Driver' application schematic from Power Management > High-Voltage LED Drivers > CL8800.

b

Run the simulation with the initial parameters: 1 Zener on TAP 6) VIN = 117 VAC, Total Lumens = 1103 Lm and LED Current = 90 mA, Power on IC = 1.5 W.

LEDs-Zener-Diodes.png

c

Replace D6 with an LED (DSeg6).

replace-D6.png

d

Run the simulation. Total Lumens = 1113 Lm and LED Current = 90m A. We can see that we gained only 10 Lm by using one LED, which is not optimum considering the cost of solution.

1113-lm.png

e

Replace DSeg5 with a ZENER diode D6 in the original schematic. Be sure to ground the LM terminal of DSeg4.

replace-DSeg5.png

f

Run the simulation. We can see that the total lumens reduces from 1103 to 985, which means a difference of 118 Lm. The LED Current and IC power remain the same at 90 mA, and 1.5 W. This means that we must keep an LED on TAP5 to obtain the requested lumen power.

985-lm.png

For superior TAPS, because they are triggered only in higher input voltages and the active period is short, we can use ZENER diodes instead of LEDs (two pieces for 230 VAC Line and one piece for 120 VAC Line voltage). At rated input voltage the difference in lumens is very small (in this case 10 Lm) so it is a good choice to use ZENER diodes in certain conditions on superior TAPS.

10.4 Case Study: Modifying taps series resistors and the impact on application parameters

The goal of this section is to understand the impact on the performance of current through the LED strip.

10.4.1 Analyze application parameter table in different configuration of the series resistors.

a

Open the 'Sequential Linear LED Driver' application schematic from Power Management > High-Voltage LED Drivers > CL8800.

b

Run the simulation without modification, stack all curves, and delete the VIN curve.

modify-taps-series-resistors.png

c

Double the Rset resistors and only put 25 Ω in Rset5.

double-rset.png

d

Run the simulation, delete the VIN curve and then stack all curves.

e

Select all of the curves and add an RMS measurement.

f

Unselect all curves and from the ‘Curves’ menu select curves and move to obtain the below graph.

modify-taps-series-resistors-sim.png

We can see that the parameters of the application significantly reduce the LED Current from 90 to 63 mA and as a result, the total lumen power decreases from 1098 to 831 Lm. The IC is less stressed, because the dissipated power reduces from 1.49 to 1.11 W. However, this modification is not recommended because of reduced performances and low utilization of the LEDs.

10.4.2 Additional Exercises

g

Reduce the Rset resistors to half of their original value.

h

Run the simulation.

i

This new configuration increases the LED current significantly, from 90 to 168 mA, and the total lumen power increases from 1098 to 1645 Lm.

The IC is too stressed because dissipated power increase from 1.49 to 3.6 W, which is not sustainable since the IC can dissipate a maximum of 2 W.
This modification is not recommended, because it stresses the IC and the LEDs.

reduce-rset-resistors.png

10.5 References

a

Datasheet

Chapter 11 - MPLAB® Mindi™ Analog Simulator - High Voltage Peak Current Mode Buck LED Drivers

The goal of this chapter is to understand how to use buck LED drivers using open-loop, peak-current mode control. In order to showcase the functionality of the parts, the MPLAB® Mindi™ simulation tool will be used to explore the HV9910B/C models.

11.1 Prerequisites

11.2 Case Study: HV9910C Led Driver (120 VAC/DC and 230V AC/DC)

The goal of this section is to understand and analyze using MPLAB® Mindi™ analog simulator how to set the input voltage Vin for a specific AC Offline input.

a

Vin=120 VAC (Sine, F=60 Hz, Initial= -120*1.414, Pulse= 120*1.414).

HV9910C-Led-Driver-sim.png

b

Vin=230 VAC (Sine, F=50 Hz, Initial= -230*1.414, Pulse= 230*1.414).

HV9910C-Led-Driver-sim-2.png

11.2.1 Open Loop Peak Current Controller

The goal of this section is to understand and analyze what an open loop peak current controller does. Throughout these exercises, the benefits of this control method will be presented.

A peak-current-controlled buck converter can give reasonable LED current variation over a wide range of input and LED voltages. It needs little effort in feedback control design. An open loop, peak current mode average current can be calculated by:

Open-Loop-Peak-Current-Controller.png

11.2.2 Start-up Simulation Examples

a

Open the HV9910C application schematic from Power Management > High-Voltage LED Drivers > HV9910C.

b

Add two differential voltage probes for VIN and VLED.

c

Add one inline current probe with the LED.

d

Modify the names for ILED and VLED to use the same graph name.

e

Run the simulation and observe the results.

HV9910C-sim.png

f

Modify the number of series and parallel LEDs in the LED string (DLED1), as seen in the figure below.

modify-number-LEDs.png

g

Run the simulation and observed the changes to the waveforms.

11.3 Case Study: Constant Frequency or Constant Off-Time Modes

This section illustrates the differences between constant frequency and constant off-time operation.

Constant-Frequency-Constant-Off-Time-Modes.png

a

Open the HV9910C application schematic from Power Management > High-Voltage LED Drivers > HV9910C.

b

Connect the resistor (R1) to GND to enable constant frequency mode.

connect-R1-GND.png

c

Change the value of R1 to 1 Meg.

d

Run the simulation.

e

Select 'VGATE' and stack the select curve. Do the same for the VRT curve.

VGATE-sim.png

f

Use the cursors to measure the desired parameter.

VGATE-sim-2.png

In-constant frequency is easier to design the EMI filter for the application.

g

To enable constant off-time mode, connect the resistor R1 to the GATE.

connect-R1-GATE.png

h

Run the simulation and analyze the waveforms as before.

Constant-Frequency-sim.png
Constant-Frequency-sim-2.png

In constant TOFF mode, TS variation depends on duty cycle:

  • Large Duty cycle => Large variation in TS with VIN
  • Small Duty cycle => Small variation in TS with VIN

11.4 Case Study: Linear and PWM Dimming

The linear dimming pin (LD) is used to control the LED current. It is useful when we cannot find the exact R1 value required for obtaining the LED current and when adjusting the current level is desired. In these cases, an external voltage divider from the VDD pin can be connected to the LD pin to obtain a voltage (less than 250 mV) corresponding to the desired voltage across R1.

PWM Dimming can be achieved by driving the PWMD pin with a low-frequency square wave signal. When the PWM signal is zero, the GATE driver is turned off; when the PWMD signal is high, the GATE driver is enabled.

11.4.1 Linear Dimming Start-Up Example

a

Open the HV9910C application schematic from Power Management > High-Voltage LED Drivers > HV9910C.

b

HV9910B has two current sense threshold voltages, an internally set 250 mV and an external voltage at the LD pin. The actual threshold voltage will be the lower of these two.

c

The default configuration is linear dimming, as the PWMD pin is tied high at 5 V.

Linear-Dimming-Start-Up.png

d

Change the value of wiper position to 90%.

change-wiper-position.png

e

Run the simulation and display the VLED and ILED curves.

VLED-ILED-sim.png

f

Change the value of wiper position to 10%.

g

Run the simulation again and display the new VLED and ILED curves to see the difference between the two duty cycles.

new-VLED-ILED.png

When using the LD pin, it is not possible to obtain zero LED current, even if the LD pin is pulled to GND. This is because of the minimum on time for the FET (450 ns). To get zero LED current, the PWMD pin needs to be used.

11.4.2 PWM Dimming Start-Up Example

h

HV9910C includes a TTL-compatible, PWM-dimming input that can accept an external control signal with a duty ratio of 0 – 100% and a frequency of up to a few kilohertz.

i

Remove the connection of LD with the wiper potentiometer and connect it at VDD.

PWM-Dimming-Start-Up.png

j

Replace the power supply with a Waveform Generator V1 (Place > Voltage Sources > Waveform Generator) and configure it a Pulse generator (F=5 kHz, Duty=10%, Pulse voltage=5 V, Rise and fall times=200 ns).

k

Run the simulation and display VPWMD, VLED, and ILED.

VPWMD-VLED-ILED.png
VPWMD-VLED-ILED-2.png

l

Change the value of the duty cycle to 90%.

m

Run the schematic and display the new VPWMD, VLED, and ILED curves to see the difference in comparison with 10% Duty Cycle.

new-VPWMD-VLED-IL.png
new-VPWMD-VLED-IL-2.png

These plots show you that the PWM-dimming response is limited only by the rate of rise of the inductor current, enabling a very fast rise and fall times of the LED current.

This happens because the PWMD signal does not turn off the other parts of the IC, therefore, the response of HV9910C to the PWMD signal is almost instantaneous.

11.5 References

a

Datasheets

Chapter 12 - MPLAB® Mindi™ Analog Simulator - Fundamentals of Linear Simulation

This chapter illustrates the simulation and measurement of linear circuits by analyzing transient, AC, noise, and Fast Fourier Transform (FFT) responses of a non-inverting amplifier. Measurements included in this analysis are signal voltages, current in the wire, device current, frequency response, and FFT.

12.1 Non-Inverting Amplifier

Open the schematic file NonInvertingAmp_MCP6001.wxsch. The circuit shown in the figure below is driven by a 2 kHz, 200 mVpp sinusoidal signal source with a DC offset of 1.5 V.

MCP6001Amplifier.PNG

a

Double-click on signal source V2 to edit its signal source type, frequency, amplitude, and offset. Select the signal source to be of type 'Sine'.

b

Select 'Enable DC' and 'Enable AC' at the top right corner of the dialog.

SignaGenerator.PNG

12.2 Transient Analysis

Next, set the simulator for performing a transient analysis.

a

Select Simulator > Choose Analysis.

b

Select 'Transient' in Analysis Mode. Also select 'DCOP'. This computes the DC operating point bias annotations shown on the schematic. Image_BiasAnnotation.PNG

c

Set the stop time of the analysis to 2 mS. A 2 mS simulation of a 2 kHz signal will run four cycles of 2 kHz. Uncheck the default setting for the '.PRINT' step and enter 500n for the resolution at which the transient response is to be computed. It is best practice to select a value 1000 times faster than the signal period to increase the output resolution. Enable the radio button 'Output at .PRINT step'. When completed select Ok.

d

Run the simulation by selecting Simulator > Run Schematic (Function Key F9).

e

Measurement probes must be placed at the input and output nodes to view the simulation results. Select Probe > Place Fixed Voltage Probe and place probes at nodes Vsignal and at AmpOut. See the figure below for placement of probes Vsignal and AmpOut.

Voltage-Probe-Placements.PNG

f

Double-click on the Vsignal and AmpOut probes to edit probe properties as shown below. Enable 'Transient Analysis'. Select Ok.

g

Run the transient analysis Simulator > Run Schematic.

h

The resulting simulation output is shown in the figure below.

i

Click on the graph, check the Vsignal and AmpOut boxes shown below and select Measure > A More Functions > Peak-to-Peak. This computes the peak-to-peak voltage of the transient signals Vsignal and AmpOut.

Graph_MCP6001AmplifierTransient_header.PNG

The output is not 400.00 mVpp as this is a real op-amp with a 1 MHz GBWP. The response of the amplifier at 2 kHz will be 54 dB and this results in an error. This is because the typical Open-Loop gain listed in the datasheet at low frequencies is 112 dB but falls off with frequency. See the figure below in the MCP6001 datasheet.

Graph_MCP6001AmplifierTransient.PNG

The error due to finite open loop gain is 1/(Avol*β) where 1/β is the feedback gain and is equal to 2, the open-loop gain of MCP6001 is 25.11K. Therefore, the gain error is 0.079 mV. To achieve 400 mVpp, change the op-amp to a high gain bandwidth amplifier such as the MCP6021 or MCP6291, which has 10 times the GBWP of MCP6001.

12.3 AC Analysis

To run the AC response of the circuit, we need to add the Bode Plot tool to the circuit.

a

Select Probe AC/Noise > Bode Plot Probe – with Measurements and place it on the schematic (this is already placed for you on the schematic). Connect the AmpOut terminal to the OUT node and Vsignal to the IN node of the Bode Plot Probe.

b

Select Simulator > Choose Analysis and select 'AC' in Analysis Mode.

c

Double-click on the AmpOut probe and select 'AC Sweep'.

Probe_AmpOut_Transient.PNG

d

Set the start frequency to 1 Hz and the stop frequency to 2 MHz with 500 points/decade. Select Simulator > Run Schematic. The resulting output is shown in the figure below.

ACSetup.PNG

e

The AC stimulus is 1 Vrms and the resulting gain is 6 dB (due to gain of 2). The graph shows the gain cross over frequency at 510 kHz. This is the frequency at which the gain plot in dB units crosses the 0 dB level.

Graph_MCP6001AmplifierAC.PNG

12.4 Noise Analysis

Intrinsic and thermal noise contributions degrade the signal-to-noise ratio of signals. This is an important attribute to consider when an amplified signal is converted to a digital format by an Analog-to-Digital Converter (ADC). Therefore, understanding noise contributions to the output signal is an essential factor in selecting an ADC for signal conversion. This section illustrates the simulation and measurement of amplifier noise contribution.

There are three sources of noise: amplifier voltage noise, amplifier current noise (converted to voltage by the equivalent source resistance), and thermal noise (arising from the gain resistors). Voltage noise en and current noise ei are provided in the datasheets. The resistor noise is given by the formula er = √4KbTR where Kb is the Boltzmann constant, R is the resistance, and T is the temperature in kelvins.

a

Select Simulator > Choose Analysis and select 'Noise'. See the dialog below.

b

Set the start frequency to 1 Hz and the stop frequency to 2 MHz.

c

In the 'Noise' parameters section, list the Output node as AmpOut. Select Simulator > Run Schematic.

NoiseSetup.PNG

d

View the noise plot by selecting Probe AC/Noise > Plot Output Noise.

e

The figure below shows the output noise at node, AmpOut, in red.

f

Run a second noise analysis with the Output node set to AmpFilter. View the noise plot by selecting Probe AC/Noise > Plot Output Noise. The output from this analysis is displayed in the figure below with a green trace.

Graph_MCP6001AmplfierNoise.PNG

g

In the figure above, we also compute the total integrated noise. Check the 'Output Noise' check box at the top of the graph as shown in the figure, then select Measure > A More Functions > Total Noise. Observe that the total integrated noise for the bandwidth limited signal after the filter formed by R1 and C2 is one half the integrated noise from the non-filtered signal at AmpOut. This is because the total noise contribution is dependent on the √ bandwidth, thus limiting the amplifier's output bandwidth will also limit the noise bandwidth, improving signal-to-noise ratio.

12.5 Fast Fourier Transform (FFT) Analysis

Fast Fourier Transforms help us observe the effect of signal components across the amplifier's bandwidth of interest and determine the noise floor of the amplifier. To run an FFT analysis, we first need to run a transient analysis and then apply the FFT Probe to the output node of interest. To get an accurate output, the transient analysis needs to be computed at user-specified time-step intervals.

a

Set up the transient analysis for FFT. Select Simulator > Choose Analysis and set Analysis Mode to 'Transient'. Uncheck 'Default' for the '.PRINT' step. Enter 500n (500 nS) for the time step interval. Enable 'Output at .PRINT step'. Run transient analysis. Select Simulator > Run Schematic.

Transient-Setup.png

b

Select Probe > Fourier > Probe Voltage Custom and place the probe tool at the AmpFilter node. Then edit the resulting FFT setup menu as shown in the dialog below. After editing select Ok.

FFTSetup.PNG

c

An FFT output will be rendered in a separate graph as shown in the figure below. Using the signal measurement cursors, we can show that the signal frequency does appear at 2 kHz and the noise floor is well below the signal.

Graph_MCP6001AmplfierFFT.PNG

12.6 Measurement of Current in Wires and Device

We can measure the current at any wire in the circuit by using Probe > Current in Wire on the circuit. Run Transient analysis first. Then select Probe > Current in Wire and place the probe at the output of the Amplifier. The resulting output is shown in the figure below.

Graph_MCP6001AmplfierOutCurrent.PNG

Next, we use Probe > Current in Device Pin to measure the current in the Amplifier itself. Select this probe and place it at the positive supply connection of the amplifier. The Amplifier quiescent current will be plotted in a graph and will look like the plot in the figure above. This shows that the supply current used by the amplifier during its signal amplification operation is a maximum of 1.6 mA.

Chapter 13 - MPLAB® Mindi™ Analog Simulator - AC Amplification

This chapter introduces the simulation of AC signal amplification and identification and analysis of error sources. This exercise guides you through the use of first-order simulations to select an amplifier to achieve a design specification.

13.1 Prerequisites

13.2 AC Amplifier Design

Design an amplifier that amplifies an AC-coupled sinusoidal signal of 2 kHz, amplitude ±200 mV to a span of 1.00 Vpp at an accuracy of 1%, and is DC-biased at half the supply voltage at the output of the amplifier. Perform an FFT analysis to view the spectral content of the amplified signal. The circuit supply voltage is set to 3 V to emulate a battery-operated system and is needed to minimize current consumption. In this lab, we will evaluate three different amplifiers: MCP6001, MCP6231 and MCP6V01.

The amplifiers referenced above differ from each other in their gain bandwidth (GBW), quiescent current, input offset voltage, and voltage noise density. This lab explores how these specifications contribute to the total error of the system by performing a transient, AC, and noise analysis of the circuit. The results from the simulation allow a first-order understanding of parameters to aid in selecting an amplifier to meet the specifications described above.

13.3 Circuit Topology & Simulation Sources

Open the file named AC Amplfier_MCP6001.wxsch. The complete schematic is shown in the figure below. The input signal is AC-coupled via capacitor Ci. Signal generator source is V1 and AC sweep analysis source is V2. AC sweep analysis uses a 1 Vrms amplitude and no phase delay.

MCP6001ACAmplifier-notes.PNG

The input signal is AC-coupled via capacitor Ci and output is biased at half the supply voltage by Ra and Rb. Capacitor Ci and the parallel combination of Rb and Ra create a high-frequency pole at 438 Hz where frequency = 1/(2*PI*Ra ||Rb*Ci) and Ri and Cg create another pole at 88 Hz where frequency = 1/(2*PI*Ri*Cg).

Capacitor Cg prevents DC gain and hence the amplifier's input offset voltage error contribution adds directly to the output. The AC gain is given by the following

Amplifier AC Gain = √12 + (Rf)2/(Ri + Xc)2 = √((Rf+Ri+Xc)2/(Ri+Xc)2)
= √ (3.9K + 1K +442)2 / (1K + 442)2 = 4.5
where Rf = 3.9K, Ri = 1K, Xc=1/ωC4=1/(2*PI*2000*180e-9)= 442.1

In the following transient and AC simulations, we observe the signal input to the amplifier and the resulting output.

13.4 Transient Analysis

Double-click on the waveform generator V1. Edit the waveform generator dialog as shown below. Amplitude is set to 200 mV with an offset of 0 mV and the frequency is 2 kHz.

WaveformGenerator_2KHz.PNG

Select Simulator > Choose Analysis > Transient. Enter a Stop time of 2 mS to get four cycles of transient responses. The first cycle in the simulation is never used as it might include system power up and other delays etc. Set the data output to be computed at 500 nS time intervals for transient analysis.

TransientAnalysis_Setup-500n.PNG

Select Place > Probe > Voltage Probe and place probe at terminal VIN. Name probe as signal_input. Place the second probe at the terminal labeled AmpOut and name the probe signal_output. Double-click the probes signal_input and signal_output. Edit the probe specifications as shown below.

Graph_MCP6001TrasientResponse.PNG

Select Simulator > Run Schematic. The transient response of the amplifier is shown in the figure below.
The measured signal_input probe is 200 mVpp. The resulting transient response at signal_output is 883 mVpp. The expected transient output is (signal_input * AC Gain) 200 mVpp * 4.5 = 900 mVpp. The error is -0.78% of the expected response. The bias annotation at the output is 0.7 mV away from the DC input value. The bias annotation points are computed when the 'DCOP' box is checked in Analysis Mode.

13.5 AC Analysis

AC Analysis is run to understand the frequency response of the circuit to the input.

a

Select Simulator > Choose Analysis > AC. Start frequency is 1 Hz and stop frequency is 2 MHz.

ACAnalysis_Setup.PNG

b

Double-click on the signal_output probes and enable 'AC Sweep'. Set the Axis type to 'Use Separate Grid'.

edit-probe-signal-output.PNG

c

The AC Analysis Bode Plot Tool is placed on the schematic and connected to AmpOut and VIN as shown here. AC response is shown in the figure below.

BodePlotTool_Setup.PNG

d

Select Simulate > Run Schematic (F9). The resulting AC response is shown in the figure below.

Graph_MCP6001ACResponse.PNG

e

From the figure above, we observe that the AC gain at 2 kHz is 4.418 and not 4.5 as computed. Flat band gain peaks around 10 kHz. The AC response at 2 kHz is not in the flat region and is closer to the pole.

f

To improve the error, we move the pole created by capacitor Ci further down in frequency by changing its value to 1 µF and then re-run the transient and AC analysis. The pole has now moved to 96.5 Hz. The AC and transient responses from the analysis are shown in the figures below respectively.

g

Gain improves to 4.509 and transient output measurements show an output of 901.3 mVpp, which results in an error of +0.14% by moving capacitor Ci to 1 µF.

Graph_MCP6001ACResponse2.PNG
Graph_MCP6001TrasientResponse2.PNG

13.5.1 AC Analysis using MCP6V01 & MCP6291

Now run the analysis using Amplifier Circuits MCP6231 and MCP6V01. These simulation files are named AC Amplfier_MCP6231 and AC Amplifier_MCP6V01 respectively. The simulation files have the signal_input and signal_output probes assigned.

a

Open the schematics and run transient and AC analysis with Ci set to 220 nF. Enable 'AC sweep' for probe signal_output and double-click on the probe. Set the Sweep Mode to 'AC' and the Axis Type to 'Use separate grid'.

b

Measure the transient response peak-to-peak output voltage and compare the output to Table 13.1. (Expected Output = 900 mV peak-to-peak)

c

Run AC analysis and measure the signal_output gain at 2 kHz and compare the output to Table 13.1. (Expected Gain = 4.5) and the figures below.

Table 13.1 AC Gain Analysis

Amplifier Measured AC Gain Measured Transient Out DC Error (mV) Measured Signal In Min Open Loop Gain (V/V) GBWP
MCP6001 4.418 883 mVpp 0.7 mV 200 mVpp 25.11K 1 MHz
MCP6231 4.466 890.2 mVpp 4 mV 199.4 mVpp 31.6 K 300 kHz
MCP6V01 4.510 899.7 mVpp 0 mV 200 mVpp 3.162 M 1.3 MHz
Graph_MCP6V01ACResponse.PNG
MCP6231-AC-Response.PNG

13.6 FFT Spectrum Output

Open the file named AC Amplfier_MCP6001.wxsch. Set up for transient analysis as in section 13.4. After the transient analysis is complete, select Probe > Fourier > Probe Voltage Custom and place the probe tool at node AmpOut. Then edit the FFT setup menu as shown in the dialog below. After editing select Ok.

FFTSetup.PNG

The FFT response curve is shown in the figure below. The spectrum at 2 kHz is the signal. The first highest spectrum at -54 dB, down from 2kHz, defines the spurious free dynamic range.

Graph_MCP6001FFTResponse.PNG

Chapter 14 - MPLAB® Mindi™ Analog Simulator - Differential Amplification

This chapter discusses different types of differential amplification topologies for amplifying very small differential signals. These simulations help understand parameters that affect accurate amplification and selection of a differential amplification topology.

14.1 Prerequisites

Chapter 1 Getting Started with MPLAB® Mindi™ and Chapter 12 Fundamentals of Linear Simulation or equivalent analog simulation experience as well as access to MCP6V01 and MCP6N16 datasheets.

14.2 Bridge Sensor Response

Open the schematic named 350OhmBridgeSensor_Disconnected.wxsch, as shown in the figure below. The complete measurement system is powered by a 1.8 V LDO regulator and the 350 Ω bridge sensor is biased by a constant current source to minimize current consumption. There are two signal terminals assigned to the schematic, SensorOutput and AmplifierOutput. SensorOutput is the output of the bridge sensor and AmplifierOutput is the amplified signal from the sensor.

350OhmBridge_Disconnected.PNG

14.2.1 Bridge Sensor Zero Strain Response

Simulate the response of the bridge sensor to strain (Sensor Disconnected from Amplifier) by setting up a DC Sweep of the bridge resistance parameter, senseres, of R7 and R9. A DC sweep of senseres from 350.1 Ω to 350 Ω approximately simulates a balanced bridge response.

a

Select Simulator > Choose Analysis > DC. The sweep changes resistors R7 and R9, parameterized as label senseres from the start value of 350.1 Ω to the stop value of 350 Ω.

b

Click on Define and set 'Sweep mode' to 'Parameter' and enter senseres as the 'Parameter name'. See dialogs below.

define-sweep-mode.png
choose-analysis.png

c

Select Place > Probe > Voltage Probe and place at terminal SensorOutput.

d

Double-click on the probe SensorOutput and set 'Analyses' to 'DC Sweep' only.

e

Click Ok and select Simulator > Run Schematic. The resulting sensor response for zero strain is shown in the image below.

Bridge-Response-to-Zero-Strain.png

Next set up a DC Sweep for emulating a full-scale strain response.

a

Open the DC Sweep dialog (Simulator > Choose Analysis > DC) and set sweep start value to 367 Ω and stop value to 350 Ω.

b

Run DC Sweep again. The image below displays the response of the bridge to full-scale bridge strain.

Graph_350OhmSensorResponse.PNG

The figures in the schematic above show the bridge zero and full-scale responses at the terminal labeled 'SensorOutput' with the amplifier disconnected.

When senseres is 350 Ω, the bridge is balanced and provides a zero-volt differential input to the amplifier and at 367 Ω, the bridge is at its full-scale output. Bias annotations (DC Operating Points or DCOP) shown on the schematic, display the final DC voltages at the end of a DC Sweep analysis.

The zero-bridge response is (at senseres of 350.01 Ω) 1.18 µV and the full-scale response (at senseres of 367 Ω) is 2.017 mV.

The bias current applied to the bridge can be viewed by selecting and placing Probe > Current in Wire at the output of constant current driver X1. An output graph will be rendered. You can use the graph cursors to measure the output, which should be around 237 µA.

14.3 Bridge Amplification Using Difference Amplifier

a

Open the file named 350OhmSensor_Amplified.wxsch. In this schematic, the bridge sensor is connected to the differential inputs of the amplifier as shown in the image below with a gain of 372.

b

The XY Probe has been renamed as 'Amplifier Output Vs Sensor Output'. Also, the SensorOutput probe has been deleted.

c

Setup DC Sweep with senseres set from 367 Ω to 350 Ω. Run DC Sweep.

d

The difference amplifier output response is shown in the image below. From the image, it's observed that SensorOutput is indicating a full-scale signal of 1.8665 mV instead of the expected output of 2.017 mV which is measured using 'REF Cursor' and 'Cursor A' as shown in the image below.

DifferenceAmplifier_Configuration_BridgeSensor350.PNG
Graph_350Ohm_AmplfierResponse.PNG

The cause of this is an equivalent impedance change caused by resistors R2 and R4 of the difference amplifier to the bridge resistance. This interferes with the bridge sensor output and results in an inaccuracy of 7.4 percent.

Hence, using a differential amplifier with gain input resistors, that are only five times the bridge sensor resistance in this circuit, results in a large inaccuracy. We can increase the gain input resistance by 10 times to 3.5 K, which also necessitates increasing the feedback gain resistor to 1.3 MΩ. Large feedback resistors contribute thermal noise errors in the form of a root mean square of the sum to the output error. However, the thermal noise from the input resistors will also see a gain error.

What we have learned from the above simulation is that a difference amplifier with very high gain is unable to isolate impedance loading effects on the bridge sensors equivalent resistance and causes degraded accuracy. However, a smaller gain can reduce this loading effect trading off higher resolution and signal-to-noise (SNR) ratio at the output. A simulation with a gain of 100 resulted in an accuracy of 1.9 percent. You can verify this by running the same simulation on the schematic 350OhmSensor_Amplified_Gain100.wxsch. We will use a different approach to solve this problem in section 14.4.

14.4 Amplification using Instrumentation Amplifier

Open the simulation file named 350OhmSensor_INAAmplifier.wxsch. The schematic is shown in the image below. In this circuit, the bridge sensor is connected to the MCP6N16 instrumentation amplifier with a gain of 391. The amplifier also has an offset of 200 mV. This is added to all amplified signals as an offset.

INAAmp_Sensorconnect.PNG

a

Select Place > Probe > Voltage Probe and place at SensorOutput terminal. Double-click and configure probe analyses to 'DC Sweep'.

b

Double-click on the XY Probe named AmplifierOutput and select 'All analyses disabled'.

c

Run DC Sweep analysis across the sensors full-scale range of 367 Ω to 350 Ω. Refer to section 14.2.1 for a refresher on DC sweep setup.

d

Sensor response is shown in the image below. This is the sensor's response through the full-scale sweep. Note that the response is 2.017 mV at full-scale. This is the sensor’s correct full-scale output as in section 14.2 (disconnected sensors full-scale output). Hence, an INA amplifier’s input does not load the sensor response and preserves the sensor output signal.

e

Next, change the DC Sweep range from 350.1 Ω to 350 Ω, to evaluate the sensor zero strain response while connected to the INA amplifier. Run the DC Sweep. Observe the bias outputs at terminal SensorOutput and AmplifierOuput. They are 11.80 uV and 205.2 mV respectively. The expected amplified zero output is 204.6 mV. This is a zero error of 0.3 percent.

f

Disable all analysis for SensorOutput probe. Enable DC Sweep analysis for AmplifierOutput probe. Set the DC Sweep range to be 367 Ω to 350 Ω and run DC Sweep.

g

The amplifier output response is shown in the image below.

h

The full-scale amplifier output response is 788.5 mV. The expected full-scale output is 788.6 mV. This is an error of 0.01% at full-scale.

Graph_350OhmBridge_Disconnected_FSOut.PNG
Instrumentation-Amplifier-MCP6N16-Full-Scale-Response.png

The simulator also allows export of graph data to other programs such as Microsoft® Excel.

Select the Amplifier Output checkbox as shown below.

amplifier-output.png

Then use Edit > Copy ASCII Data to export the data to Excel for plotting. The exported data plot is shown in the image below. The accuracy across the range spans 0.06 percent. As the INA has high impedance and high common mode rejection, the sensor bridge resistance was not affected. The above simulation results indicate that the MCP6N16 is a good choice to be a high gain amplifier in a battery-operated system for amplifying very low output differential sensor signals.

MCP6N16-Output-Vs-Sensor-Input.PNG

14.5 References

14.5.1 Datasheets

Chapter 15 - MPLAB® Mindi™ Analog Simulator - Current Sensing

This chapter presents an introduction to a couple of current sensing solutions. Two different high side current sensing topologies for battery operated systems are presented. In battery powered embedded equipment, the current sensing devices should accurately measure the sensed current in the load even when battery voltage decreases to its minimum operational value and consume very little power. The simulations below illustrate this application.

15.1 Prerequisites

15. 2 High Side Current Sensing

Design a circuit to sense high side current in a battery operated embedded design and show proof of concept using the MPLAB® Mindi™ analog simulator. The solution must be designed to operate at 1.8 V LDO output and tested at 1.8 V supply rail. The variable load resistance range is 9 Ω to 18 Ω. The sense resistor chosen should be commercially available and should minimize heat dissipation at the sensed currents while maintaining a reasonably large sensed voltage for amplification.

15.2.1 Current Sensing using Difference Amplifier

Open the schematic named HighsideCurrentSensing_MCP6V01.wxsch as shown below. The circuit is configured as a difference amplifier for measuring the current across the 5 mΩ sense resistor. With VDD at 1.8 V, a load of 9 Ω will sink 200 mA and a load of 18 Ω will sink 100 mA.

The symbol, E1, is a voltage-controlled voltage source of gain 1 and is used to measure the sensed voltage input (vsense=isense*Rsensed). It is used as the X input to probe AmplifierOut that plots amplified output versus the sensed voltage.

The current probe, IPROBE1, measures the load current.

The load resistor, R5, is parameterized ("restail") to vary the load for a DC sweep simulation that will simulate the sensing current from 100 mA to 200 mA.

MCP6V01CurrentSensing_Highside.PNG

The figure above shows a differential configuration with a gain of 1773 (R1/R2), amplifying the sensed voltage across the 5 mΩ sense resistor. To optimize the signal output and to allow the use of lower valued gain resistors, 5 mΩ was chosen. The lower value gain resistors cause the least interference with the sense resistor’s resistance. In addition, 5 mΩ is also a commercially available sense resistor.

a

Add DC bias annotations to the positive input and negative inputs of the E1. Select Place > Bias Annotation > Place Marker at E1 + input and – input.

b

Set up the DC sweep to simulate a load current change as shown below.

MCP6V01CurrentSensing_DCsweep_dialog.PNG

c

Double click on IPROBE1,
i. In the Probe Options/Analyses dialog, set DC Sweep
ii. In the Probe Options/Analyses dialog, set Use separate Graph. Write the graph name as "Load Current".

d

Double click on probe AmplifierOut. In the Probe Options/Analyses dialog, select All analyses disabled.

e

Select Simulator > Run Schematic (F9). Two graphs will be rendered, one for probe IPROBE1 and the other for AmplifierOut respectively.

f

Sweeping the resistor R6 from 9 Ω to 18 Ω drives a current of 200 mA to 100 mA through the load respectively. The simulation results are displayed in the figures below. It shows the load current output versus the load resistance change and the amplified output versus the sensed current voltage.

g

Using our measurement cursors, we read a load current of 199.9 mA at 9 Ω and 100 mA at 18 Ω. We can use Measure > Minimum and Measure > Maximum to read amplified outputs of 889.97 mV and 1.775 V for sensed outputs of 500.2 µV and of 999.6 µV respectively.

h

The ideal sensed current amplified output at 100 mA is (100 mA * 5 mΩ) * 1773 = 886.5 mV. The ideal sensed current amplified output at 200mA is (200 mA * 5mΩ) * 1773 = 1.773 V. Therefore, the zero error is 0.39% and full-scale error is 0.11%.

MCP6V01CurrentSensing_Loadcurrent.PNG
MCP6N16CurrentSensing_Output.PNG

Next, compute the expected total error contributions for this circuit. There are two error sources, common mode rejection ratio (CMRR) and input offset voltage.

CMRR Error Contribution:
Refer to the MCP6V01 data sheet. On page 3, you will note that the common mode input range maximum exceeds the supply rail and is VDD + 0.2V and that the minimum CMR is 130dB.
Error contribution to output from common mode = [Vsense/CMRR] * Gain (non-inverting)
CMRR = 10(130db/20) = 3.16 x 106
Gain = 1 + R1/R2 = 1774
Vsense = 500 µV
CMRR Error Contribution is = (500 µV/3.16 x 106) * 1774 = 280 nV

Input Offset Error Contribution:
The input offset error contribution is measured as a ratio to the input sense voltage at a minimum load current, as this provides the worst-case error. Error due to input offset voltage = MCP6V01 offset/Sense Voltage = ±2 µV/500 µV = 4 mV.

As the two errors are non-correlated, we will take the square root of the sum of squares of the individual errors, yielding a total error of 4 mV. Our observed error from the simulation is around 2 mV.

The bias annotations show that the positive input to the differential input is at 1.8 V which is the supply voltage of the MCP6V01. Although one of the inputs is at the power supply rail voltage, the amplifier accurately amplifies this signal as the common mode voltage input range includes the supply rail of the MCP6V01. You can verify this on page 3 of the MCP6V01 data sheet, under specification common mode input voltage range. It is listed as VDD + 0.2 V. Note that we used 0.1% tolerance resistors for the difference amplifier gain resistors, 5% tolerance for the sense resistor and 1% tolerance for the load resistor to achieve this result.

15.2.2 Sensing with an Instrumentation Amplifier

Next, we will use an instrumentation amplifier to sense the load current. Open the file HighSideCurrentSensing_MCP6N16.wxsch. Observe in the figure below, the current sensing solution is configured similarly to the difference amplifier solution to provide a gain of 1773 for an input of 500 µV across the 100 mA to 200 mA load current range. Run the DC Sweep simulation.

MCP6N16CurrentSensing_Highside.PNG

The simulation results of the INAAmpOut and LoadCurrent probe outputs are shown in the figures below.

Observe that the amplified sensed current outputs are similar to the difference amplifier. Hence, the resulting accuracy of the solution is the same. If you open the MCP6N16 datasheet and observe the CMRR and the offset of the MCP6N16, they are 112 dB and 17 µV respectively. The 17 µV of offset should contribute an error of 34 mV. However, this is not the case as the INA has a zero-drift architecture that compensates for offset voltages.

MCP6N16CurrentSensing_Output.PNG
Load-Current-vs-Load-Resistance.png

15.3 Supply Voltage Effects on Current Sensing

15.3.1 Using a General-Purpose Amplifier

Open the simulation file named Current_Sensing_HighSide_LowBattery_MCP6001. The circuit shown in the figure below is configured as a difference amplifier and is sensing current across the 10 mΩ sense resistor. The amplifier selected for this purpose is the general purpose MCP6001 with a minimum CMRR of 60 dB and a maximum offset voltage of ±4 mV.

A changing supply voltage is simulated by sweeping the DC power supply source V2 from 3.3 V to 1.8 V. The gain of the difference amplifier is 303. The voltage-controlled voltage source, E1, is set up to monitor the differential output * gain. The amplifier's output is the sensed voltage * gain. The XY Probe plots amplified sense voltage against the supply voltage change (Vdd). The resulting plot from the simulation is displayed in the figure below.

MCP6001Highside_CurrentSense_Batterysweep.PNG

Zoom into the Y-axis of the graph to view the small change in output. From the figure below, we observe that the output changes by 22.81 mV when the power supply of the amplifier changes from 3.3 V to 1.8 V. There are many parameters that affect this gain. They are: Power Supply Rejection Ratio (PSRR), Common Mode Rejection Ratio (CMRR), input offset voltage and the input bias current * equivalent source resistance of the circuit.

The expected output is 1.158 V and the actual output is 0.9376. This is a large error. This error arises due to the power supply rejection ratio, the limited common mode input range of the amplifier, as well as reduced common mode rejection ratio (60dB). The expected error contributions are:

1

Output Error due to CMR=[∆Vcm/ CMRR (V/V)]*Gain

[(0.15) / 10(60dB/20)] 303 = 45.45 mV

where ∆Vcm = Vdd – Vcm(data sheet) is computed at the test conditions specified in data sheet Vdd/2 = 1.65.

2

Output Error due to PSRR Error= (∆Supply * Gain) / 10(PSRR in dB/20)

((3.3 V-1.8 V) * 303)/ 10(86dB/20) = 22.8 mV

3

Output Error due to Offset Error= (Input Offset Voltage * Gain)

(300 µV) * 303) = 90.9 mV

4

Total Error is = √(CMR Err)2+ (PSRR Err)2+ (Offset Err)2 = 104 mV

MCP6001HighsideCurrentSense_BatterysweepOut_.PNG

Although the common mode input of the MCP6001 amplifier extends to the rails VDD + 0.3 V, section 4.1.3 in the datasheet states that common modes inputs in the range of VDD-1.1V should be avoided to stay away from gain non-linearity and distortion. According to our simulation, this effect contributes to the additional error beyond 104 mV.

15.3.2 Using Precision Amplifier

Next, we will use precision amplifier MCP6V01 to evaluate its response to power supply changes. The common mode input range of this supply is at the supply rail and rejection ratio is 130 dB and offset is ±2 µV. Open the simulation file named Current_Sensing_HighSide_LowBattery_MCP6V01. See the figure below.

MCP6V01HighsideCurrentSense_Batterysweep.PNG

Run the DC sweep simulation. The output will be as shown in the figure below.

MCP6V01HighsideCurrentSense_BatterysweepOut_.PNG

In the above simulation, there are two important observations:

  • Amplifiers output does not change when supply voltage changes
  • Accuracy of sensed current is maintained, 1.1586 V is only 0.06% from the expected output of 1.15798 V.

This simulation illustrates that a precision amplifier (MCP6V01) with common mode input range that extends beyond the supply rails (VDD + 200 mV), a high CMRR (130 dB), and very low offset (2 µV) voltage is a good choice for current sensing in battery-powered embedded systems, as it can measure the sensed current with high precision even when battery voltage is at the common mode rails of the amplifier. The bias annotations on the schematic at the end of the DC sweep are at 1.8 V (amplifier rail voltage) at the non-inverting input and 1.7961 V at the inverting input.

15.3.3 Using an Instrumentation Amplifier

Repeat the above analysis using INA MCP6N16. The minimum CMRR is 112 dB and the PSRR is 110 dB. Open the simulation file named Current_Sensing_HighSide_LowBattery_MCP6N16. See the figure below.

Run DC sweep. Simulate > Choose Analysis > Analysis Mode/DC Sweep. The output is shown in the figure below.

MCP6N16HighsideCurrentSense_Batterysweep.PNG

The INA based current sensing solution also displays no changes in sensed current when the supply voltage drops from 3.3 V to 1.8 V and behaves similarly to the MCP6V01.

Conclusions: Amplifiers with rail-to-rail common mode input range, high CMRR > 100 dB, very low offsets or offset compensated are good candidate amplifiers for current sensing in low power embedded applications where accurate current monitoring is needed even when the battery supply voltage drops with time and usage.

MCP6N16HighsideCurrentSense_BatterysweepOut.PNG

The INA-based current sensing solution also displays no changes of the sensed current when the supply voltage drops from 3.3 V to 1.8 V. In addition, the output accuracy is 0.03%. A small improvement from the difference amplifier solution.

15.4 References

15.4.1 Datasheets

15.4.2 Evaluation Boards

Chapter 1 to 15 - MPLAB® Mindi™ Analog Simulator Hands On Workbook

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