Microchip Master Block
MasterBlock.PNG

The Microchip Master block dropped into a model sets up the model's parameters for code generation. Block options let you do the following:

  • Select the targeted MCU.
  • Select the Oscillator used and configure the Clock Speed through PLL.
  • Select a Busy Flag Pin to monitor CPU load.
  • Select various chip dependent options (power management options, memory protection, debugger pin, etc.).


The Microchip Master Block must be placed in any Simulink® model to target a microchip. When the Microchip Master block is dropped into a model, the model parameters are checked and automatically updated if required. Typically, code generation requires to set the model solver with the fixed step discrete time solver (we do not want to generate code for a solver handling differential equations). Thus, if the model is not already set with a discrete time solver, the model is updated to a discrete solver and the fixed-step size is set to 1 ms (i.e., sampling rate or fundamental sample time of 1 kHz).

General Tab

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The 'Target' defines the targeted microcontroller from the 246+ list of supported ones.

'Time-Step synchronization' provides information about the time step trigger source. Typically, a timer is used. When an Analog-to-Digital Converter (ADC) block is used, the ADC is triggered by a timer and the end of the ADC conversion trigger the time step. In both cases, the blockset configures the timer to match the model fixed step solver period. When the model uses a Pulse Width Modulation (PWM) block, it is possible to make the PWM block trigger the ADC (once or several times per PWM periods) and then end of ADC conversion trigger the time step. In this last case, you must ensure that PWM and ADC trigger setting matches with the Simulink solver period set in the model (otherwise, there might be an incoherency between generated code and model regarding times steps).

The 'Busy Flag Port' sets one pin as a digital output. The scheduler sets this pin to 1 during execution of the steps (the pin is set to during idle states). Monitoring this pin with an oscilloscope allows you to retrieve information about the real-time execution. The duty cycle represents the CPU load. The Task State block can be used to get further detailed on the different tasks execution time.

You must take care of real-time constraints. While simulation does not have real-time constraints, the embedded controller is expected to calculate its outputs within the given period defined by the model 'Time Step'.

The Power Save Mode checkbox allows turning the microcontroller into a lower power consumption mode during the idle time (i.e., in between time-steps).

Other parameters provide power-up options such as the following:

  • Brown-out reset (BOR)
  • Power-on Reset (POR)
  • Reset Target Vector
  • Peripheral pin select configuration

The options available in this category depend on the microcontroller being used.

Oscillator Tab

MasterBlock_OscillatorTab_2.PNG

The 'Oscillator Source' pop-up menu selects the oscillator within four options (depending on the chip):
• Internal Fast RC (FRC)
• Internal Low Power RC (LPRC)
• Crystal or Ceramic Resonator
• External Clock

The 'Oscillator Frequency' sets the oscillator frequency. The value (in Hertz) must match the frequency of the hardware oscillator source. For external oscillators, the possible range for the selected option is shown between brackets. Using an oscillator outside this frequency range may lead to unexpected behavior. For internal chip oscillators FRC and LPRC, the default frequency for the selected oscillator are always shown; the selected value must be a value of ±15%, otherwise, a warning is displayed and the value is reset to the default value. Fine tuning the frequency to better match the oscillator frequency improves the model's timing accuracy.

This change does not modify the microcontroller running frequency. This is different from the fine-tuned frequency of the internal oscillator available on some devices.

'Achieved Instruction per Seconds' provides the number of instructions executed per second by the currently selected device (expressed in Million Instructions Per Second (MIPS)). This value depends on the Oscillator Source Frequency, the PLL configuration, and the number of clock cycles per instruction of the selected device.

'Activate clock multiplier/divider (PLL)' is possible for some Oscillator source (depending on the chip). When selected, it enables the 'Targeted Instructions per Second' option to specify the targeted number of Instructions Per Second (IPS). The possible IPS range is shown between brackets when the phase lock loop (PLL) setting provides a fine output frequency resolution or discrete values singleton for older PLL with discrete capabilities. The IPS parameter should be within the given range. The block configures the microcontroller using the closest achievable frequency. The frequency achieved is updated in the 'Achieved Instructions per Second' text box. The blockset tolerates a PLL output frequency up to +5% above the upper bound (use negative frequency to disable this check). In such a case, it is your responsibility to ensure that the IPS frequency is compatible with its application.

Other options such as 'Clock Switching and Monitor', 'Two-speed Oscillator Start-Up', and 'OSC2 Pin Function' are device-specific and is shown accordingly.

Memory and Debug Tabs

MasterBlock_MemoryAndDebugTab_2.PNG

'Set Memory Protection' options and programming/debugging are pins used. The options available in these tabs are device-specific.

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