All three MPLAB® XC C compilers allow you to embed assembly instructions in-line with C source code; however, using in-line assembly is risky because the compiler cannot understand the operation of the assembly instructions contained in these statements. Typically, the instructions are simply copied into the output with no knowledge of how they will interact with the surrounding code.
For example, if the compiler was caching a value in a register and in-line assembly clobbered that register, the code executed after the assembly would read corrupted values from that register.
If you are using MPLAB XC16 or XC32 you should always use the extended form of the asm statement to ensure your code is robust and more readable.
This more descriptive form of assembly coding allows you to specify parameters that describe the input and output operands of the instruction as well as the device registers the instruction might change. This additional information allows the compiler to make adjustments to the surrounding output so that it can avoid or preserve resources used by the in-line assembly.
Extended syntax qualifiers can also indicate that instructions should not be optimised by the compiler, which is a common requirement for in-lined code.
The extended asm syntax allows you to reference C variables and labels in the instruction operands, making it easier for your in-line assembly to interact with C objects and labels, and making your assembly code more readable. Parameter constraint letters allow the compiler to ensure that the C variable is in a suitable form for the instruction.
For details of the syntax and a full list and description of the parameter constraint letters, consult your XC compiler User’s Guide.
In the following MPLAB XC16 example, the asm statement’s constraint string parameters indicate that the multiply instruction uses the near-data-space C variable, myInput, as the input operand. The output operand string tells the compiler that myOutput is overwritten and that it will be located in the multiplication support register, W2. Since the instruction is qualified as volatile, it will be immune to optimizations performed by the assembler.