SAM L10/L11 Tamper Detection

Tamper Detection Overview

Keeping and protecting application secrets requires a reliable and efficient feature to rapidly discard and erase parts of the device containing the secrets. The SAM L10/L11 embeds a chip-level tamper detection mechanism on physical memories to resist micro probing attacks. The tamper detection is part of the Real Time Counter (RTC).

The Data Flash and TrustRam are anti-tamper protected, and the detection is fully configurable to provide a different set of actions depending on the channel of the detection occurred.

The related RTC registers to configure the tamper detection are Enable-Protected Registers:

  • Tamper Control register (TAMPCTRL)
  • Tamper Control B register (TAMPCTRLB)
  • Tamper ID register (TAMPID)
  • Control B register (CTRLB)
  • Tamper Event Control Register (EVCTRL)

The RTC provides four tamper channels that can be used for tamper detection for the three counter modes of the RTC (8/16 and 32-bit). The action of each tamper channel is configured using the Input n Action bits i[n=0…3] in the Tamper Control register (TAMPCTRL.INnACT). In order to determine which tamper source caused a tamper event, the Tamper ID register (TAMPID) provides the detection status of each tamper channel. These bits remain active until cleared by software.

RTC Tamper Detections and resulting actions

Based on Tamper Detection, RTC can generate different system actions:

  • Direct Memory Access (DMA) request: If the DMA Enable bit in the Control B register (CTRLB.DMAEN) is ‘1’, a DMA request will be triggered by the timestamp. The request is set on the capture of the timestamp. The request is cleared when the Timestamp register is read.
  • Interrupt: Used to indicate detection of a valid signal on a tamper input pin or tamper event input. A single interrupt request (TAMPER) is available for all tamper channels.
  • Generate Event (Output): On detection of a valid signal on a tamper input pin or tamper event input.
  • From an Event (Input): Capture the RTC counter to the timestamp register. To be enabled within the Event System (EVCTRL.TAMPEVTEI).
  • Reset General Purpose Registers (GPn): Only when tamper detection occurs while CTRLA.GPTRST = 1.

External Input Tamper Detection

Up to four polarities, external inputs (INn) can be used for tamper detection. The polarity for each input is selected with the Tamper Level bits in the Tamper Control register (TAMPCTRL.TAMPLVLn). Separate debouncers are embedded for each external input. The debouncer for each input is enabled/disabled with the Debounce Enable bits in the Tamper Control register (TAMPCTRL.DEBNCn).

The debouncer configuration is fixed for all inputs as set by the Control B register (CTRLB). The debouncing period duration is configurable using the Debounce Frequency field in the Control B register (CTRLB.DEBF). The period is set for all debouncers (i.e., the duration cannot be adjusted separately for each debouncer). When TAMPCTRL.DEBNCn = 0, INn is detected asynchronously. See Figure 27-6 in the device data sheet for an example.

When TAMPCTRL.DEBNCn = 1, the detection time depends on whether the debouncer operates synchronously or asynchronously, and whether majority detection is enabled or not. Synchronous versus asynchronous stability debouncing is configured by the Debounce Asynchronous Enable bit in the Control B register (CTRLB.DEBASYNC).

Refer to product data sheet for more details.

Timestamping on Tamper detection

As part of the tamper detection, the RTC can capture the counter value (COUNT/CLOCK) into the TIMESTAMP register. Three CLK_RTC periods are required to detect the tampering condition and capture the value. The TIMESTAMP value can be read once the Tamper flag in the Interrupt Flag register (INTFLAG.TAMPER) is set.

A new timestamp value cannot be captured until the Tamper flag is cleared, either by reading the timestamp or by writing a ‘1’ to INTFLAG.TAMPER. If several tamper conditions occur in a short window before the flag is cleared, only the first timestamp may be logged. However, the detection of each tamper will still be recorded in TAMPID.

Active Layer Protection

The RTC provides a way of detecting broken traces on the PCB, also known as Active Layer Protection. In this mode, a generated internal RTC signal can be directly routed over critical components on the board using the RTC OUT output pin to one RTC INn [n=0…3] input pin. A tamper condition is detected if there is a mismatch on the generated RTC signal. The Active Layer Protection mode and the generation of the RTC signal are enabled by setting the RTCOUT bit in the Control B register (CTRLB.RTCOUT).

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