SAM L11 Mix-Secure Peripherals

Mix-Secure Peripherals Overview

The SAM L11 embeds five Mix-Secure peripherals, which allows part of their internal resources to be shared between Secure and Non-Secure worlds. A complete list of SAM L11 Mix-Secure peripherals and their shared resources are as follows:

  • Peripheral Access Controller (PAC): manages the peripherals security attribution (Secure or Non-Secure).
  • Non-Volatile Memory Controller (NVMCTRL): handles the Secure and Non-Secure Flash region programming.
  • I/O Pin Controller (PORT): supports the individual allocation of each I/O to the Secure or Non-Secure applications.
  • External Interrupt Controller (EIC): supports the individual assignment of each external interrupt to the Secure or Non-Secure applications.
  • Event System (EVSYS): supports the individual assignment of each event channel to the Secure or Non- Secure applications.


The capability for a Mix-Secure peripheral to share its internal resources depends on the security attribution of that peripheral in the PAC peripheral (PAC Secured or PAC Non-Secured).

  • When a Mix-Secure peripheral is Secure (PAC.NONSECx fuse set to zero), the Secure world can allocate internal peripheral resources to the Non-Secure world using dedicated registers.
  • When a Mix-Secure peripheral is Non-Secure (PAC.NONSECx fuse set to one), the peripheral behaves as a standard Non-Secure peripheral. Secure and Non-Secure accesses to the peripheral register are granted.

Mix-Secured Peripheral (PAC Secured)

When a Mix-Secure peripheral is PAC Secured (associated PAC NONSECx fuses set to 0), the peripheral register is banked and accessible through two different memory aliases, as shown in the figure below.

saml11-mix-secure-periph_1.png


The Secure world can then independently enable Non-Secure access to the internal peripheral resources using the NONSEC register, as shown in the following figure for the EIC.

saml11-mix-secure-periph_2.png


The NONSEC register content can only be modified by the Secure world through the peripheral register Secure alias (PERIPH_SEC.NONSEC). Setting a specific internal feature bitfield in the NONSEC register enables access to the different bitfields associated with this feature in the peripheral Non-Secure alias.

Mix-Secured Peripheral (PAC Non-Secured)

When a Mix-Secure peripheral is PAC Non-Secure (associated NONSECx fuses set to 1), the peripheral behaves as a standard Non-Secure peripheral. Secure and Non-Secure accesses to the peripheral register are granted. The peripheral register mapping is shown in the figure below.

saml11-mix-secure-periph_3.png


Managing PAC Non-Secured, Mix-Secured peripherals at the application level is similar to managing a standard Non-Secure peripheral.

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