8-Bit CCP/ECCP Capture Mode

The Capture Mode operates the same way for a CCP or ECCP peripheral. There can be multiple CCP peripherals in one device and each can be independently configured for capture mode. Each will also have a designated CCP I/O pin associated with the the CCP module.

Capture mode makes use of the 16-bit Timer1. When a specified event occurs on the designated CCP pin, the 16-bit Timer1 value is stored in a pair of 8-bit registers dedicated to the compare module. Those registers are the Compare Register High Byte and Compare Register Low Byte (CPRxH:CCPRxL).

A specified Compare event is defined as one of the options below and is configured by the four CCP Mode Select Bits CCPxM<3:0> of the Capture/Compare/PWM Control Register (CCPxCON).

  • Every falling edge
  • Every rising edge
  • Every 4th rising edge
  • Every 16th rising edge

CCPxCON: CCPx Control Register

R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
bit 7 bit 0

bit 3-0

CCPxM3-CCPxM0: CCPx Mode Select Bits

0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge

When a capture is made, the CCP Interrupt Flag bit CCPxIF of the Peripheral Interrupt Register PIRx is set. Software can automatically react, when interrupts are enabled, by running an interrupt service routine that will read the CPRxH:CCPRxL registers. The flag can also be monitored in software and operate on the CPRxH:CCPRxL captured time value when the flag bit it is set.

In either case, the interrupt flag must be cleared in software. If another capture occurs before the value in the CPRxH:CCPRxL register pair is read, the old captured value is overwritten by the new captured value.

For more information on interrupts refer to the Enhanced Mid-Range Interrupts Section

TIMER1 (Capture Mode)

In order for CCP/ECCP Capture mode to operate properly, Timer1 must be running in either Timer mode or Synchronized Counter mode. This allows the capture mode to correctly capture the Timer1 value on the external CCPx pin event.

Reference Timer1 Module for more information on configuring Timer1.

Note: The capture operation may not work in Asynchronous Counter mode.


The software design must configure the CCPx pin as an input for the Capture Mode by setting the associated TRIS bit. Also, on some newer devices, the CCPx pin function can be moved to alternative pins using the APFCON0 or APFCON1 registers or through the Peripheral Pin Select feature.



When in Capture mode and a capture is made, the CCP Interrupt Flag bit (CCPxIF) of the Peripheral Interrupt Register (PIRx) is set. The interrupt flag can be monitored via software or an automatic interrupt can be initiated thus sending program control to an interrupt service routine. The interrupt flag must be cleared in software. For more detail on the interrupt structure of 8-bit devices refer to the Interrupts Training Module.

When the Capture mode is changed, a false capture interrupt may be generated. The software developer should clear the CCPxIF interrupt flag bit of the PIRx register following any change in Capture mode.

PRESCALER (Capture Mode)

The prescaler can delay reaction to an event on the CCPx pin. The capture of the Timer1 value can be delayed to capture on the 1st edge (falling or rising), the 4th edge (rising only), or the 16th edge (rising only). These three prescaler settings are determined by the CCPxM<3:0> bits of the CCPxCON register.

Prescaler divide by 1
Capture mode: every falling edge (CCPxM<3:0> = 0100)
Capture mode: every rising edge (CCPxM<3:0> = 0101)

Prescaler divide by 4
Capture mode: every 4th rising edge (CCPxM<3:0> = 0110)

Prescaler divide by 16
Capture mode: every 16th rising edge (CCPxM<3:0> = 0111)


Whenever the CCP module is turned off, or the CCP module is not in Capture mode, the prescaler counter is cleared. Any Reset will also clear the prescaler counter.

Switching from one capture prescaler to another does not clear the prescaler and may generate a false interrupt. To avoid this unexpected operation, turn the module off by clearing the CCPxCON register before changing the prescaler.

SLEEP (Capture Mode)

Capture mode depends upon the Timer1 module for proper operation. Two of the Timer1 clock source options will work with the Capture mode: the Fosc/4 instruction clock and the external clock option. Each clock source has a different effect on Capture mode during sleep.

If Timer1 is driven by the instruction clock (FOSC/4), Timer1 will not increment during sleep. This means that the Capture mode will not work during sleep. When the device wakes from sleep, Timer1 will continue from its previous state.

If Timer1 is driven by an external clock, then Timer1 will continue to increment in sleep mode and Capture mode will also operate during Sleep.

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