PIC18FXXJ Limitations

Headers are available but optional for debug when using these devices. See the “Processor Extension Pak and Debug Header Specification” for details.

  • General Debug Limitations
  • General Programming Limitations
  • The SLEEP instruction cannot be used when debugging unless the device is set to Break on SLEEP Instruction (Debugger > Breakpoints, Event Breakpoints).
  • The Watchdog Timer (WDT) cannot be used when debugging unless the device is set to Break on Watchdog Timer (Debugger > Breakpoints, Event Breakpoints).
  • You cannot view the stack even though you can access it.
  • You cannot single step through an interrupt. Due to hardware restrictions, the debugger/emulator cannot jump to the interrupt vector memory location in Single Step mode.
  • Breakpoint can corrupt shadow registers. Shadow register values can be trashed if a breakpoint is set inside a routine where they are used. Store values elsewhere if you need to use a breakpoint in this situation.
  • Data breakpoints do not halt on the STKPTR register. The data comparator in the silicon does not have access to the STKPTR register so breaks on stack pointer will not occur.
  • Configuration bit values incorrect for a code-protected device. For these devices, configuration bits are part of program memory. Therefore, on code-protected devices, configuration bits will read as zero even if values are entered in MPLAB X IDE.
  • Do not step over an instruction that clears INTCON:GIEL and GIEH. If you do so, the GIEL and/or GIEH bits will not be updated with the cleared value and the previous value will be kept. E.g., stepping over BCF INTCON,GIE will not stop interrupts. However, stepping over BSF INTCON,GIE will turn on interrupts. This is to prevent single stepping from always vectoring into interrupts. Setting a breakpoint past the clearing of the interrupt and running is a good work-around.
  • SPI Trace is not functioning as expected. For the PIC18F46J50, PIC18F46J11 and other similar devices, SCK/SDO is on RB4/RC7 and not RC3/RC5 or RB1/RC7 as usual. Therefore, SPI trace does not function as expected.
  • Only one data capture resource available. Although three or five breakpoint resources are available for these devices, only one data capture resource is available for use. (EM)
  • Trace and Log macros within tight loops do not work when using IO PORT Trace. The workaround is to use No Operation (NOP) instructions within the loop. (EM)

Freeze on Halt Limitations

  • Peripherals are frozen while halted and single stepping.
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