Low Power Application on SAM L21 Using Harmony v3 Peripheral Libraries: Step 4


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Step 4.1: Configure Power Manager (PM) Peripheral Library

1

Under the bottom left tab, Available Components, expand Peripherals > PM.
Double click or drag and drop PM to add the PM peripheral library to the project graph.

pm_box.png

2

Select the PM peripheral library and configure it as shown below.

  • Set the Performance Level to 0 to reduce the power consumption of the device during Standby mode.
  • Enable PD0 and PD1 Dynamic Power Gating: these options allow the device to turn off a power domain during Standby mode if no peripheral contained in this power domain requests its clock.
  • Set the Voltage Regulator to operate in Low-power oriented mode during standby to reduce the power consumption of the device even more.
pm_configuration_options.png

This completes the configuration of the PM peripheral library. In Standby mode, the CPU is stopped as well as the peripherals except those which are configured to run in Standby mode. The Standby Sleep mode provides very low power consumption with little overhead on wake-up time. CPU enters Standby mode by executing the Wait for Interrupt (WFI) instruction and exits from the Standby mode when an interrupt is generated.

Step 4.2: Configure SUPC Peripheral Library

1

Under the bottom left tab, Available Components, expand Peripherals > SUPC.
Double click or drag and drop SUPC to add the Supply Controller (SUPC) peripheral library to the project graph.

supc_box.png

2

Select the SUPC peripheral library and configure it as shown below.

  • Enable the Increase low power mode efficiency bit to optimize and reduce power consumption in Standby mode.
supc_configuration_options.png

This completes the configuration of the SUPC peripheral library. The SUPC manages the voltage reference and power supply of the device. It also controls the voltage regulators for the core domain. Voltage regulators need to be configured for low power applications, which helps in reducing power consumption.

Step 4.3: Configure NVMCTRL Peripheral Library

1

The Non-volatile Memory Controller (NVMCTRL) is added by default to the project graph. Select the NVMCTRL peripheral library and configure it as shown below.

  • Set Wait States to 1 to read the non-volatile memory. When the device is put in performance level 0, the device clock frequency can not exceed 12 MHz and one wait-state is required.
  • Set the Power Reduction Mode During Sleep to WAKEUP INSTANT. This bit configures the NVMCTRL to wake-up the Flash memory when the CPU wakes up from Standby mode, which allows it to reduce device wake-up time.
  • Disable the Instruction Cache to reduce the device's wake-up time. When the cache is enabled, the device will look for an instruction to fetch upon interrupt in the cache at first. If the instruction is found, the device wakes up quicker, but if not, a cache miss occurs and wake-up time is longer. This option is good to enable when the instruction to fetch upon an interrupt is always stored in the cache memory, which is not the case here as we have different interrupt sources.
nvmctrl_configuration_options.png

This completes the configuration of the NVMCTRL peripheral library. The NVMCTRL is set to optimize the performances for waking the device up while keeping the power consumption as low as possible.

Step 4.4: Configure LED and Wake-up Test Pins

1

Open the Pin Configuration tabs by clicking Tools > Pin Configuration.

pin_settings_tool.png

2

Once the MHC Pin Settings window is opened, scroll-down to pin number 6 and 23, and then configure these pins as shown below:

  • Set the pin #6 as GPIO:
    • Pin ID = PB05
    • Custom Number = TEST_GPIO
    • Function = GPIO
    • Direction = Out
    • Latch = Low
  • Set the pin #23 as GPIO:
    • Pin ID = PB10
    • Custom Number = LED0
    • Function = GPIO
    • Direction = Out
    • Latch = High
test_gpio_pin_settings.png



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