Un-Brick an AVR® Xplained Board

What can "brick" an Xplained board and keep it from working?

There are several fuses related to the various programming interfaces on an AVR device that can disable the Xplained board ("brick" it) even after a power cycle. In this article, we discuss the five fuses that are responsible for most incidences of bricking the board and detail how to fix each issue.

ISP Programming Interface

SPIEN

Configuring the “SPIEN” Fuse to Disable the ISP Programming Interface (Fuse Bit Set to "1")

Unless you are an experienced AVR user it might not be obvious that the ISP interface utilizes the main SPI port as a programming interface. Although this fuse is labeled as the “SPIEN” fuse it doesn’t actually enable/disable the standard SPI peripheral. It enables or disables the ISP programming interface (which uses the SPI port). By default, ISP is enabled (fuse bit set to "0").

RECOVERY

If it’s disabled the only recovery option is the JTAG interface (if it has one and it’s accessible) or the HVPP or HVSP interface which is most likely not accessible.

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RSTDSBL

Configuring the “RSTDSBL” Fuse to Disable the Reset Pin (Fuse Bit Set to "0")

Unless you are an experienced AVR user it might not be obvious that the ISP programming interface uses three of the SPI pins (SCK, MISO, MOSI) along with the Reset pin. Therefore, disabling the Reset pin effectively disables the ISP interface. By default, the RESET pin function is enabled (fuse bit set to "1").

RECOVERY

If the RESET pin becomes disabled, the only recovery option is the JTAG interface (if it has one and it’s accessible) or the HVPP or HVSP interface which is most likely not accessible.

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CKSELx

Configuring the “CKSELx” Fuses to Select an External Clock Source that is Not Present

Unless you are an experienced AVR user it might not be obvious that the ISP programming interface will not function unless the MCU is being driven by an active clock source. Therefore if an invalid clock source (for instance an external clock that is not present) is selected the ISP interface will not function. By default, the internal 8 MHz RC oscillator is the clock source.

RECOVERY

If an invalid source is selected the only recovery option is the JTAG interface (if it has one and it’s accessible) or the HVPP or HVSP interface which is most likely not accessible. Neither the JTAG, HVPP, or HVSP interface require a valid clock to operate.
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DWEN

Configuring the “DWEN” Fuse to Enable the debugWIRE Interface on the Reset Pin

This is a confusing, but RECOVERABLE condition.

Unless you are an experienced AVR user it might not be obvious that the one-wire debugWIRE interface utilizes the Reset pin. Enabling the debugWIRE interface disables the use of the Reset pin. The ISP interface requires access to the Reset pin so it’s no longer functional when debugWIRE is enabled. By default, debugWIRE is disabled (the fuse bit is set to "1"). It is enabled whenever a debug session is started in Studio.

RECOVERY

If it’s enabled it can’t be disabled through the standard Device Programming window option in Studio because that option requires a functional ISP interface. There is, however, a trick to disabling the debugWIRE interface without having to use the HVPP or HVSP interface. A project must be created in Studio targeting the specific Tiny or Mega device being used. Then a "debug" session needs to be started by selecting Debug > Attach to Target, then exited by choosing the Debug > Disable debugWire and Close option, as shown:

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JTAG programming interface

JTAGEN

Configuring the “JTAGEN” Fuse to Disable the JTAG Port

The JTAG port doesn’t rely on the device Reset pin, nor does it require a valid clock source feeding the MCU, so disabling Reset or selecting an invalid clock source will not affect its operation. The one way it can be disabled is through the JTAGEN fuse.

RECOVERY

If it’s disabled, the only recovery option is the ISP interface (if it has one and it’s accessible) or the HVPP or HVSP interface which is most likely not accessible.

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Fuse Change Warnings

Studio IDE now provides warnings when the user is about to make a change to a critical fuse setting. Below are examples of some of those warnings that pop up in the Device Programming window.

Here is the Device Programming window with the Fuses section selected:

Here is the warning window that opens if SPIEN is disabled:

Here is the warning window that opens if JTAGEN is disabled:

Here is the warning window that opens if CKSEL is changed:

Here is the warning window that opens if RSTDISBL is enabled:

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